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db cool ? remote thermal controller and voltage monitor ADT7466 rev. 0 in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 461. 31 13 ? 2005 analog de vices, i n c. al l r i ght s r e ser v ed . features monitors two a n alog voltages or thermistor temperature inputs one on-chip and up to two re mote temperature sensors wit h series resist ance cancellation controls and m o nitors the speed of up to two fans automatic fan speed contro l mode controls system cooling based on measured t e mperature enhanced acoustic mode dra m atically r e duc e s user perception of changing fan speeds thermal protection feature via therm output monit o rs performance impact of intel? pentium? 4 processor thermal control circuit vi a prochot input 3-wire fan spee d meas uremen t limit comparis on of all monitored values smbus 1.1 seri al interface applic ati o ns low acoustic n o ise notebook pcs general description the ADT7466 db c o ol co n t r o l l er is a co m p lete th er ma l m o ni t o r a nd d u a l fan con t r o l l er fo r n o is e-s e n s i t i v e a p pli c a t io ns r e q u ir in g ac t i v e sy st em co oli n g. i t ca n m o n i t o r tw o a n a l og v o l t a g es o r t h e tem p er a t ur e o f t w o t h er mist o r s, pl us i t s o w n s u p p l y v o l t a g e . i t ca n m o ni t o r t h e tem p era t ur e o f u p t o tw o r e m o te s e ns o r d i o d es, pl us i t s o w n in ter n a l tem p er a t ur e. i t can m e a s ur e an d con t r o l t h e sp e e d o f u p to tw o fa ns s o t h a t t h e y o p era t e a t t h e l o w e s t p o s s i b le sp e e d fo r mini m u m aco u s t ic n o is e. th e a u t o ma t i c fan s p e e d co n t r o l lo o p o p t i mi zes fan s p e e d fo r a g i v e n t e m p era t ur e . the ef fe c t i v en e ss o f t h e sys t e m s t h er ma l s o l u t i on can b e m o ni to r e d usin g t h e pro c h o t in p u t to t i me a n d mo n i tor t h e pro c h o t output of t h e pro c e s s o r . func tio n a l block di agram serial bus interface configuration registers therm register interrupt masking address pointer register interrupt status registers value and limit registers acoustic enhancement control automatic fan speed control limit comparators fan speed monitor v_fan_min v_fan_on control 8-bit dac 8-bit dac v cc gnd refout scl sda alert band gap reference 10-bit adc drive1 drive2 tach1 tach2 fanlock fan1_on/ prochot/ therm d1+ d1 ? ain1/th1/d2? ain2/th2/d2+ series resistance cancellation band gap temperature sensor series resistance cancellation input signal conditioning and analog multiplexer fan1 enable prochot ADT7466 04711- 001 fi g u r e 1 . protected by u.s. patent numbers 6,188, 189; 6,169,442; 6,097,239; 5,982,221; 5,867,012.
ADT7466 rev. 0 | page 2 of 48 table of contents specifications ..................................................................................... 3 serial bus timing ......................................................................... 5 absolute maximum ratings ............................................................ 6 thermal characteristics .............................................................. 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 functional description .................................................................. 11 measurement inputs .................................................................. 11 sequential measurement ........................................................... 11 fan speed measurement and control ..................................... 11 internal registers of the ADT7466 .......................................... 11 theory of operation ...................................................................... 12 serial bus interface ..................................................................... 12 write and read operations ....................................................... 14 alert response address (ara) ................................................ 15 smbus timeout .......................................................................... 15 voltage measurement ................................................................ 15 reference voltage output .......................................................... 16 configuration of pin 11 and pin 12 ......................................... 16 temperature measurement ....................................................... 17 series resistance cancellation .................................................. 17 temperature measurement method ........................................ 17 using discrete transistors ........................................................ 17 temperature measurement using thermistors ..................... 19 reading temperature from the ADT7466 .............................. 20 additional adc functions ....................................................... 21 limit values ................................................................................ 21 alert interrupt behavior ............................................................ 23 configuring the ADT7466 therm pin as an output ......... 25 fan drive ..................................................................................... 26 pwm or switch mode fan drive ............................................. 26 fan speed measurement ........................................................... 26 fan start-up timeout ................................................................ 28 automatic fan speed control .................................................. 29 starting the fan .......................................................................... 30 xor test mode ............................................................................... 31 application circuit ......................................................................... 32 ADT7466 register map ................................................................. 33 register details ........................................................................... 35 outline dimensions ....................................................................... 47 ordering guide .......................................................................... 47 revision history 6/05revision 0: initial version
ADT7466 rev. 0 | page 3 of 48 specifications t a = t min to t max , v cc = v min to v max , unless otherwise noted. 1 table 1. parameter min typ max unit test conditions/comments power supply supply voltage 3.0 3.3 5.5 v supply current, i cc 1.4 3 ma interface inactive, adc active 30 70 a standby mode, digital inputs low temperature-to-digital converter local sensor accuracy 1 c 20c t a 60c; v cc = 3.3 v 3 c ?40c t a +125c; v cc = 3.3 v resolution 0.25 c remote diode sensor accuracy 1 c 20c t a 60c; ?40c t d +125c; v cc = 3.3 v 3 c ?40c t a +105c; ?40c t d +125c; v cc = 3.3 v 5 c ?40c t a +125c; ?40c t d +125c resolution 0.25 c remote sensor source current 192 a high level 72 a mid level 12 a low level series resistance cancellation 0 2 k? maximum resistance in series with thermal diode that can be cancelled out thermistor-to-digital converter temperature range 30 100 c range over which specified accuracy is achieved. wider range can be used with less accuracy. resolution 0.25 c accuracy 2 c using specified thermistor and appl ication circuit over specified temperature range analog-to-digital converter input voltage range 0 v ref v v ref = 2.25v total unadjusted error (tue) 1 2.5 % differential nonlinearity (dnl) 1 lsb power supply sensitivity 1 %/v conversion time (a in input) 8.30 8.65 ms averaging enabled conversion time (local temperature) 8.63 8.99 ms averaging enabled conversion time (remote temperature) 35.22 36.69 ms averaging enabled conversion time (v cc ) 7.93 8.26 ms averaging enabled total monitoring cycle time 68.38 71.24 ms averaging enabled, pin 11 and pin 12 configured for ain/th monitoring (see table 15) total monitoring cycle time 87 90.63 ms averaging enabled, pin 11 and pin 12 configured for rem2 monitoring (see table 15) fan rpm-to-digital converter accuracy 4 % full-scale count 65,535 nominal input rpm 109 rpm fan count = 0xbfff 329 rpm fan count = 0x3fff 5000 rpm fan count = 0x0438 10000 rpm fan count = 0x021c internal clock frequency 78.64 81.92 85.12 khz
ADT7466 rev. 0 | page 4 of 48 parameter min typ max unit test conditions/comments drive outputs (drive1, drive2) output voltage range 0C2.2 v digital input = 0x00 to 0xff output source current 2 ma output sink current 0.5 ma dac resolution 8 bits monotonicity 8 bits differential nonlinearity 1 lsb integral nonlinearity 1 lsb total unadjusted error 5 % i l = 2 ma reference voltage output (refout) output voltage 2.226 2.25 2.288 v output source current 10 ma output sink current 0.6 ma open-drain serial data bus output (sda) output low voltage (v ol ) 0.4 v i out = ?4.0 ma, v cc = 3.3 v high level output current (i oh ) 0.1 1 a v out = v cc digital inputs (scl, sda, tach inputs, prochot ) input high voltage (v ih ) 2.0 v input low voltage (v il ) 0.8 v hysteresis 0.5 v digital input current (tach inputs, prochot ) input high current (i ih ) ?1 a v in = v cc input low current (i il ) 1 a v in = 0 input capacitance ( in ) 20 pf open-drain digital outputs ( alert , fanlock , fan1_on/ therm ) output low voltage (v ol ) 0.4 v i out = ?4.0 ma, v cc = 3.3 v high level output current (i oh ) 0.1 1 a v out =v cc serial bus timing 2 clock frequency (f sclk ) 400 khz see figure 2 glitch immunity (t sw ) 50 ns see figure 2 bus free time (t buf ) 1.3 s see figure 2 start setup time (t su;sta ) 0.6 s see figure 2 start hold time (t hd;sta ) 0.6 s see figure 2 scl low time (t low ) 1.3 s see figure 2 scl high time (t high ) 0.6 s see figure 2 scl, sda rise time (t r ) 1000 ns see figure 2 scl, sda fall time (t f ) 300 ns see figure 2 data setup time (t su;dat ) 100 ns see figure 2 detect clock low timeout (t timeout ) 25 64 ms can be optionally disabled 1 all voltages are measured with respect to gnd, unless otherwise specified. typical values are at t = 25c and represent the most likely parametric norm. logic inputs accept input high voltages up to 5 v even when the device is operating at supply voltages belo w 5 v. timing specifications are tested at logic levels of v = 0.8 v for a falling edge and at v = 2.0 v for a rising edge. a il ih 2 guaranteed by design, not production tested.
ADT7466 rev. 0 | page 5 of 4 8 serial bus timing 04711-003 scl sda ps s p t su; s t o t hd ; s t a t su ; s t a t su ; d a t t hd; da t t hd ; s t a t hi g h t bu f t lo w t r t f f i gure 2. d i agr a m f o r s e ri al bus tim i n g
ADT7466 rev. 0 | page 6 of 4 8 absolute maximum ratings table 2. p a r a m e t e r r a t i n g positive supply voltage (v cc ) 6 . 5 v voltage on any other pin ?0.3 v to 6.5 v input current at any pin 5 ma package input current 20 ma maximum junction temperature (t j max) 150c storage temperature range ?65c to +150c lead temperature, soldering: ir peak reflow temperature 220c lead temperature (10 sec) 300c esd rating 2000 v s t r e s s es g r e a t e r t h a n t h os e li s t e d u n der a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m an en t da ma g e t o t h e de v i ce . this is a st re ss r a t i n g on l y and f u nc t i on a l op e r a t i o n of t h e d e v i c e a t t h e s e o r a n y o t h e r condi t i on s ab o v e t h o s e indi ca te d i n t h e o p er a t io n a l s e c t io n o f t h is sp e c if ic a t io n is no t im pl ie d . e x p o sur e t o a b s o l u te max i m u m r a t i ng co ndi t i on s fo r ex tende d p e r i o d s ma y a f fe c t de vice rel i a b i l i t y . thermal c h aracteristics 16-l e ad qso p p a c k a g e: ja = 105c/w jc = 39c/w esd caution esd (electrostatic discharge) se nsit ive device . electrostatic charges as hig h as 4000 v readily accumulate on the human bod y and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circ uitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, pro p er esd prec autions are recommended to avoid perfor mance degrada - tion or los s of functional ity.
ADT7466 rev. 0 | page 7 of 4 8 pin conf iguration and fu nction descriptions 04711-002 ADT7466 top view (not to scale) drive1 1 scl 16 tach1 2 sda 15 drive2 3 alert 14 tach2 4 refout 13 gnd 5 ain2/th2/d2+ 12 v cc 6 ain1/th1/d2? 11 fan1_on/prochot/therm 7 d1+ 10 fanlock 8 d1? 9 f i gure 3. pin config ur ation ta ble 3. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic type description 1 drive1 analog output output of 8-bit dac controlling fan 1 speed. 2 tach1 digital input fan tachometer input to measur e speed of fan 1. 3 drive2 analog output output of 8-bit dac controlling fan 2 speed. 4 tach2 digital input fan tachometer input to measur e speed of fan 2. 5 gnd ground ground pin for analog and digi tal circuitry. 6 v cc power supply 3.3 v power supply. v cc is also monitored through this pin. 7 fan1_on/ prochot / ther m digital i/o if configured as fan1_on, this pin is the ope n- drain control s i gnal output for the dc-dc converter. active (high) when drive1 > v_f a n_ min. if configured as prochot , the input can be connected to the prochot output of th e intel pentium 4 processor to time and monitor prochot assertion s . if configured as ther m , this pin is the i n terrupt output to flag critical th ermal events. 8 fanlock digital output open-drain digital output. this output is assert ed (low) when e i ther of the fans stall or fail to spin up. 9 d1? analog input cathode conne ction to thermal diode 1. 10 d1+ analog input anode connecti o n to thermal d i ode 1. 11 ain1/th1/d2? analog input 0 v to 2.25 v an alog input. can be reconfig ured as thermistor input or as a cathode connectio n to thermal diode 2. configured for t h ermistor connection by default. 12 ain2( t h2)/d2+ analog input 0 v to 2.25 v an alog input. can be reconfig ured as thermistor input or as an anode connectio n to thermal diode 2. configured for t h ermistor connection by default. 13 refout analog output 2.25 v reference voltage output, 20 ma maxi mum output current. 14 alert digital output open-drain digital output. the smbus alert pin alerts the system to out-of-limit events such as a failed fan, overtemper ature, or out-of-limit analog mea s urement. 15 sda digital i/o open-drai n digital i/o. smbus bi dire ctional ser i a l d a ta. requires sm bus pull-up resistor. 16 scl digital input open-drai n digital input. sm bus serial c l ock i n p ut. requires smbus pull-up resi s t or.
ADT7466 rev. 0 | page 8 of 4 8 typical perf orm ance cha r acte ristics 20 ?60 ?50 ?40 ?30 ?20 ?10 0 10 0 100 80 60 40 20 04711-004 leakage resistance (m ? ) te mp e rature e rror ( c) d+ to gnd d+ to v cc f i gure 4. t e mper at ur e e r ror v s . pc b t r ack r e s i s t a n c e 20 ?10 ?5 0 5 10 15 06 45 3 2 1 04711-005 noise frequency (mhz) te mp e rature e rror ( c) 100mv 250mv f i gure 5. r e mo te t e mpe r atu r e e r ror v s . p o wer su p p ly no is e f r eque nc y 35 ?20 ?15 ?10 ?5 0 5 10 15 20 25 30 06 45 3 2 1 04711-006 noise frequency (mhz) te mp e rature e rror ( c) 100mv 250mv f i gure 6. l o c a l t e m p er atu r e e rror v s . p o w e r sup p l y n o is e f r equ e nc y 0 ?70 ?60 ?50 ?40 ?30 ?20 ?10 02 20 15 10 5 04711-007 capacitance (nf) te mp e rature e rror ( c) 5 device 1 device 2 device 3 f i gure 7. t e mper at ur e e r ror v s . cap a c i tanc e bet w een d+ and d ? 40 ?5 0 5 10 15 20 25 30 35 06 45 3 2 1 04711-008 noise frequency (mhz) te mp e rature e rror ( c) 60mv 100mv 40mv f i gure 8. r e mo te t e mpe r atu r e e r ror v s . co mm on-m ode n o is e f r equenc y 90 80 ?10 0 10 20 30 40 50 60 70 06 45 3 2 1 04711-009 noise frequency (mhz) te mp e rature e rror ( c) 60mv 100mv 40mv f i gure 9. r e mo te t e mpe r atu r e e r ror v s . d i fferenti a l mod e nois e f r eque nc y
ADT7466 rev. 0 | page 9 of 4 8 7 6 5 4 3 2 1 0 3.0 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 3.2 04711-010 v dd (v) i dd ( a) device 1 device 2 device 3 f i gure 10. standb y sup p ly c u rrent vs. sup p ly v o ltag e 16 12 14 10 8 6 4 2 0 0 5 0 100 150 200 250 300 350 400 04711-011 scl frequency (khz) s hutdown i dd ( a) device 1 device 2 device 3 f i gure 1 1 . sta n db y c u rrent vs . cl ock f r equenc y 120 80 100 60 40 20 0 ?20 ?40 ? 4 0 ? 20 0 2 0 4 0 6 0 8 0 100 120 04711-014 actual temperature ( c) p e n tium 4 re ading ( c) f i gure 12. p e nti u m 4 t e mper ature me asur e m ent v s . a d t 7 4 6 6 r e ad ing 140 120 100 80 60 40 20 0 06 50 40 30 20 10 04711-012 time (s) me as ure d te mp e rature ( c) 0 internal external f i g u re 13. r e s p ons e to the r ma l sh ock 1.00 0.99 0.98 0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.90 0.89 3.2 3.0 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 04711-013 v dd (v) i dd (ma) device 1 device 2 device 3 f i gure 14. sup p l y current v s . sup p ly v o ltag e 2 ?6 ?5 ?4 ?3 ?2 ?1 0 1 ?40 0 20 40 60 85 105 125 04711-015 temperature ( c) te mp e rature e rror high spec mean low spec f i gure 15. l o c a l t e mpe r atu r e e r ror
ADT7466 rev. 0 | page 10 of 48 2 ?5 ?4 ?3 ?2 ?1 0 1 ?40 0 20 40 60 85 105 125 04711-016 temperature ( c) te mp e rature e rror high spec mean low spec f i gur e 1 6 . re mo te t e mp e r a t ur e err o r
ADT7466 rev. 0 | page 11 of 48 functional description the ADT7466 is a complete thermal monitor and dual fan controller for any system requiring monitoring and cooling. the device communicates with the system via a serial system management bus (smbus). the serial data line (sda, pin 15) is used for reading and writing addresses and data. the input line, (scl, pin 16) is the serial clock. all control and programming functions of the ADT7466 are performed over the serial bus. in addition, an alert output is provided to indicate out-of-limit conditions. measurement inputs the device has three measurement inputs, two for voltage and one for temperature. it can also measure its own supply voltage and can measure ambient temperature with its on-chip temperature sensor. pin 11 and pin 12 are analog inputs with an input range of 0 v to 2.25 v. they can easily be scaled for other input ranges by using external attenuators. these pins can also be configured for temperature monitoring by using thermistors or a second remote diode temperature measurement. the ADT7466 can simultaneously monitor the local temperature, the remote temperature by using a discrete transistor, and two thermistor temperatures. remote temperature sensing is provided by the d+ and d? inputs, to which diode connected, remote temperature sensing transistors such as a 2n3904 or cpu thermal diode can be connected. temperature sensing using thermistors is carried out by placing the thermistor in series with a resistor. the excitation voltage is provided by the refout pin. the device also accepts input from an on-chip band gap temperature sensor that monitors system ambient temperature. power is supplied to the chip via pin 6. the system also monitors v cc through this pin. it is normally connected to a 3.3 v supply. it can, however, be connected to a 5 v supply and monitored without going over range. sequential measurement when the ADT7466 monitoring sequence is started, it sequentially cycles through the measurement of analog inputs and the temperature sensors. measured values from these inputs are stored in value registers, which can be read out over the serial bus, or can be compared with programmed limits stored in the limit registers. the results of out of limit comparisons are stored in the status registers, which can be read over the serial bus to flag out-of-limit conditions. fan speed measurement and control the ADT7466 has two tachometer inputs for measuring the speed of 3-wire fans, and it has two 8-bit dacs to control the speed of two fans. the temperature measurement and fan speed control can be linked in an automatic control loop, which can operate without cpu intervention to maintain system operating temperature within acceptable limits. the enhanced acoustics feature ensures that fans operate at the minimum possible speed consistent with temperature control, and change speed gradually. this reduces the users perception of changing fan speed. internal registers of the ADT7466 table 4 provides brief descriptions of the ADT7466s principal internal registers. more detailed information on the function of each register is given in table 30 to table 72. table 4. internal register summary register description configuration these registers provide cont rol and configuration of the ADT7466 including alternate pinout functionality. address pointer this register contains the address that selects one of the other internal registers. when writing to the ADT7466, the first byte of data is always a register address, which is written to the address pointer register. status these registers provide status of each limit comparison and are used to signal out- of-limit conditions on the temperature, voltage, or fan speed cha nnels. whenever a status bit is set, the alert output (pin 14) goes low. interrupt mask these registers allow interrupt sources to be masked so that they do not affect the alert output. value and limit the results of analog voltage inputs, temperature, and fan speed measurements are stored in these registers, along with their limit values. offset these registers allow each temperature channel reading to be offset by a twos comple ment value written to these registers. prochot status this register allows the ADT7466 to monitor and time any prochot events gauging system performance. t min these registers program the starting temperatur e for each fan under automatic fan speed control. t range these registers program the temperature-to-fan speed cont rol slope in automatic fan speed control mode for each fan drive output. enhance acoustics this register sets the step size for fan drive changes in afc mode to minimize acoustic noise.
ADT7466 rev. 0 | page 12 of 48 theory of operation serial bus interface the s e r i al sys t e m ma na g e m e n t b u s (s mb us) is us e d t o co n t r o l th e ADT7466. the ADT7466 is co nn ec t e d t o t h is b u s as a s l a v e de vice u nder t h e co n t r o l o f a mas t er co n t r o l l er . the ADT7466 has a n s m b u s tim e o u t f e a t ur e. w h en this is ena b le d, t h e s m bus t i m e s o u t a f t e r typ i c a l l y 25 m s o f n o ac t i v i ty . h o w e ver , t h is fe a t ur e i s ena b le d b y de f a u l t. bi t 5 o f c o nf igura t ion reg i st er 1 (0x00) s h o u ld b e s e t to 1 t o dis a b l e th i s f e a t ur e . the ADT7466 su p p o r ts o p tio n a l p a c k et er r o r c h ec k i n g (p ec). i t is t r ig ger e d b y su p p ly in g t h e ext r a clo c k p u ls es fo r t h e p e c b y te . the p e c b y t e is c a l c u l a t e d using crc- 8. the f r ame c h e c k s e q u e n ce (fcs) co nfo r m s t o cr c-8 b y t h e p o l y n o mial () 1 1 2 8 + + + = x x x x c c o n s u l t t h e s m bus s p e c if ica t ion s r e v . 1.1 fo r m o r e info r m a t i o n (w w w .s m b us.o rg). the ADT7466 has a 7-b i t s e r i a l b u s addr es s, w h ic h is f i xed a t 1001100. the s e r i al b u s p r o t o c ol o p era t es as fol l o w s: the mas t er ini t i a t e s da t a t r an sfe r b y e s t a b l i s hi n g a st a r t condi t ion, def i n e d as a hig h -t o-lo w tra n si t i o n o n t h e s e r i al da ta l i n e s d a wh ile t h e ser i al c l oc k lin e scl r e m a i n s hi g h . th i s in d i ca t e s tha t a n addr es s/da t a s t r e a m fol l o w s. al l sla v e p e r i pherals co nn e c t e d to t h e s e r i a l b u s r e sp o nd to t h e st a r t co ndi t i o n , a nd sh if t i n t h e ne x t 8 b i t s , c o ns i s t i ng of a 7 - bi t a d d r e s s ( m sb f i r s t ) an d a r / w b i t, w h ich deter m i n es t h e dir e c t io n o f t h e da t a t r a n sfer , t h a t is, w h et h e r da t a is wr i t t e n t o o r r e ad f r o m t h e sla v e de vic e . the addr es s o f t h e ADT7466 is s e t a t 1001100. s i nce t h e addr es s m u s t al wa ys be f o llo w ed b y a wr i t e b i t (0) o r a r e ad b i t (1), an d da ta is g e n e ral l y ha n d le d in 8-b i t b y t e s, i t ma y b e m o r e con v en- ien t t o think tha t the ADT7466 has a n 8-b i t wr i t e addr es s o f 10011000 (0x98 ) a n d an 8-b i t r e ad addr es s o f 10 011001 (0x99). the p e r i ph eral w h os e addr es s c o r r es p o n d s t o t h e t r a n s m i t t e d addr ess r e sp o nds b y p u l l ing t h e d a t a li n e lo w d u r i n g t h e lo w p e r i o d b e fo r e t h e 9t h clo c k p u ls e, k n o w n as t h e ack n o w le dge b i t. al l ot her de vices on t h e b u s n o w r e mai n id l e w h i l e t h e s e lec t e d de vice wa i t s f o r da t a t o be r e ad f r o m o r wr i t t e n t o i t . i f th e r / w b i t is 0, t h e mas t er wr i t e s t o t h e s l a v e de vic e . i f t h e r/ w b i t is 1, t h e mas t er r e ads f r o m t h e sl a v e de vi ce . da t a is s e n t o v er th e s e r i al b u s in s e q u en ces o f 9 c l o c k p u ls es, 8 bit s of d a t a f o l l o w e d b y an a c k n ow l e d g e bit f r om t h e s l ave d e v i c e . t r ans i t i ons on t h e d a t a l i n e m u s t o c c u r d u r i ng t h e l o w p e r i o d o f t h e c l o c k sig n al and r e ma in s t a b l e d u r i n g t h e hig h pe ri od , be ca use a lo w - t o - h igh tra n si ti o n w h en t h e c l ock i s h i gh ma y b e i n te r p re te d a s a stop s i g n a l . t h e n u mb e r of da t a b y te s tha t c a n be tra n smi t t e d o v er t h e s e r i al b u s in a s i n g le r e ad o r wr i t e o p era t io n is limi t e d onl y b y w h a t t h e mas t er a n d s l a v e de vices ca n hand le. w h en a l l da t a b y tes ha ve b e e n r e ad o r wr i tten, sto p co ndi t i o n s a r e es t a b l i s he d . i n wr i t e m o de , t h e mas t er p u l l s t h e da t a li n e hig h d u r i n g t h e 10t h clo c k p u ls e t o ass e r t a st o p co ndi t i on. i n r e ad m o de , t h e mas t er de v i ce o v er r i des t h e ack n o w le dg e b i t b y p u lli n g t h e da ta li n e h i g h d u ri n g th e lo w pe rio d b e f o r e th e nin t h clo c k p u ls e. this is k n o w n as n o a c k n o w le dge. t h e m a s t e r tak e s th e da ta lin e lo w d u ri n g t h e lo w p e ri od be f o r e th e 10t h clo c k p u ls e, a nd t h en hig h d u r i n g t h e 10t h clo c k p u ls e t o ass e r t a st o p co ndi t i on. an y n u m b er o f b y tes o f da t a can b e t r a n sfer r e d o v er t h e s e r i a l b u s in on e op er a t io n, b u t i t is no t p o ssi b l e t o m i x r e ad an d wr i t e in on e o p era t ion, b e c a us e t h e t y p e o f o p era t ion is de t e r m i n e d a t t h e b e g i n n in g and subs e q ue n t ly ca nn ot b e chan ge d wi t h ou t st a r t i n g a ne w op er a t ion. ADT7466 wr i t e o p era t io n s con t a i n ei t h er o n e or tw o b y t e s, and r e ad o p era t io n s co n t a i n on e b y te , a nd p e r f o r m t h e fol l o w in g fu n c ti o n s . t o wr i t e da t a t o o n e o f t h e de vi ce da t a r e g i s t ers o r r e ad da t a f r o m i t , t h e addr es s p o in t e r r e g i s t er m u s t b e s e t s o t h a t t h e co r r e c t da t a r e g i ster is ad dr ess e d , an d d a t a can b e wr i t te n to t h a t re g i s t e r or re a d f r om it . t h e f i r s t b y te of a w r ite op e r a t i o n al wa ys co n t a i n s a n addr es s t h a t is s t o r e d i n t h e addr es s p o in t e r r e g i s t er . i f da t a i s t o b e wr i t t e n to t h e de vic e , t h e wr i t e o p er a t ion co n t a i n s a s e cond da t a b y te t h a t is wr i t ten to t h e r e g i ster s e le c t e d b y t h e addr es s p o in t e r r e g i s t er . this is s h o w n i n f i gur e 17. th e de vice addr es s i s s e n t o v er t h e b u s follo w e d b y r/ w s e t t o 0. this is f o l l o w ed b y tw o da ta b y t e s. th e f i rs t da t a b y t e is t h e addr es s o f t h e in t e r n al da t a r e g i s t er to b e wr i t t e n t o , w h ich is st o r e d in t h e ad dr ess p o in t e r r e g i st er . the s e cond da t a b y te i s t h e da t a to b e w r it te n to t h e i n te r n a l d a t a re g i ste r . w h en r e adin g da t a f r o m a r e g i s t er , t h er e a r e t w o p o s s i b i l i t ies . i f the ADT7466 addr es s p o in t e r r e g i s t er val u e is unk n o w n o r n o t t h e desir e d va l u e , i t is n e cess a r y t o f i rst s e t i t t o t h e co r r e c t v a lu e b e f o re d a t a c a n b e re a d f r om t h e d e s i re d d a t a re g i ste r . this is don e b y p e r f o r min g a wr i t e t o t h e ADT7466 as bef o r e , b u t o n l y t h e da t a b y te co n t aining t h e reg i s t er addr es s is s e n t s i nc e da t a i s not to b e w r it te n to t h e re g i ste r . t h i s i s sh ow n i n f i gur e 18. a r e ad o p er a t ion is t h en p e r f o r m e d co n s ist i n g o f t h e s e r i a l b u s addr ess, r/ w b i t s e t t o 1, fol l o w e d b y t h e da t a b y te r e ad f r o m t h e da t a r e g i s t er . this is sh o w n i n f i gur e 19. i f t h e addr es s p o in t e r r e g i st er is kn o w n t o alr e ad y b e a t t h e desir e d a ddr ess, d a t a ca n b e r e a d f r o m t h e co r r esp o nd in g da t a r e g i s t er w i t h o u t f i rs t wr i t in g t o t h e addr es s p o i n t e r r e g i s t er , s o t h e p r o c e d ur e i n f i gur e 18 c a n b e o m i t t e d .
ADT7466 rev. 0 | page 13 of 48 04711-017 scl sda start by master ack. by ADT7466 ack. by ADT7466 ack. by ADT7466 stop by master frame 2 address pointer register byte frame 1 serial bus address byte 1 19 19 9 1 0 0 1 1 0 0 r/w d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 scl (continued) sda (continued) frame 3 data byte f i gur e 1 7 . w r i t i n g a regi ster a ddr ess t o the a ddr ess p o i n t e r re gi st er , th en w r i t i n g d a ta t o the s e l ect e d re gi st er 04711-018 19 1 9 1 0 0 1 1 0 0 r/w d7 d6 d5 d4 d3 d2 d1 d0 start by master ack. by ADT7466 ack. by ADT7466 stop by master frame 2 address pointer register byte frame 1 serial bus address byte scl sd a f i g u re 18. w r it ing t o t h e addres s p o int e r r e g i s t er o n ly 04711-019 19 1 9 1 0 0 1 1 0 0 r/w d7 d6 d5 d4 d3 d2 d1 d0 start by master ack. by ADT7466 no ack. by master stop by master frame 2 address pointer register byte frame 1 serial bus address byte scl sd a f i g u re 19. r e ad ing d a t a f r o m a p r ev i o us ly s e lec t ed r e g i s t er a l t h ou g h it i s p o ss ibl e to re a d a da ta b y t e f r o m a d a ta r e gi s t e r wi t h o u t f i rs t wr i t in g t o t h e addres s p o i n t e r r e g i st er if t h e addr es s p o in t e r r e g i s t er is alr e ad y a t t h e co r r e c t val u e , i t is n o t pos s i b l e t o wr i t e da t a t o a r e g i ster wi th ou t wr i t in g t o t h e addr ess p o in t e r r e g i s t er , b e c a us e t h e f i rst da t a b y te o f a wr i t e is al w a ys w r it te n to t h e a ddre s s p o i n te r re g i ste r . i n a d d i t i on to s u pp or t i ng t h e s e nd b y te a n d re c e ive b y te p r o t o c ols, th e ad t7466 als o s u p p o r ts the r e ad b y t e p r o t o c ol (s e e t h e s m bus s p e c if ica t io n s r e v . 1.1 fo r m o r e info r m a t io n). i f i t is r e q u ir e d to p e r f o r m s e v e ra l r e ad o r wr i t e o p era t io n s in su c c e s s i on, t h e maste r c a n s e nd a re p e a t st ar t c o nd i t ion inste a d o f a sto p con d i t i o n to b e g i n a ne w o p er a t ion.
ADT7466 rev. 0 | page 14 of 48 write and read oper ations the s m bus sp e c if ica t ion def i n e s s e v e ra l p r o t o c ols fo r dif f er en t typ e s o f wr i t e and r e ad op era t i o n s . th e p r o t o c ols us e d in t h e ADT7466 a r e dis c us s e d in the f o l l o w in g s e c t ion s . th e f o l l o w ing abb r e v i a t i o ns are u s e d i n t h e d i ag r a ms : ss t a r t p s t o p r r e a d w w r i t e a a c k n o w l e d g e a n o a c k n o w le dg e write operati o ns the ADT7466 us es th e s e n d b y t e an d wr i t e b y te p r o t o c ols. se n d b y t e i n t h i s o p era t io n, t h e mas t er de vice s e n d s a sing le co mman d b y te to a s l a v e d e v i c e , a s fol l o w s : 1. the mast er de vi ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mast er s e nds t h e 7-b i t s l a v e addr ess fol l o w e d b y t h e wr i t e b i t (lo w ). 3. the ad dr ess e d sla v e de vi ce ass e r t s a c k o n sd a. 4. the mast er s e nds a r e g i s t er addr es s. 5. the sla v e as s e r t s a c k o n sd a. 6. the mast er ass e r t s a st o p con d i t io n o n sd a and t h e tra n sa cti o n en ds. f o r th e adt74 66, th e s e n d b y te p r o t o c ol is us ed t o wr i t e a r e g i st er ad dr ess t o r a m fo r a subs e q ue n t sing le -b y t e r e ad f r o m t h e s a m e ad dr ess. this is sh o w n in f i gur e 20. 04711-020 slave address register address sw a a 24 13 p 5 6 f i gure 2 0 . s e tting a regi st er a ddr ess for subsequ e nt read i f i t is r e q u ir ed to r e ad da t a f r o m t h e r e g i st er imm e dia t e l y a f t e r s e t t in g u p t h e addr es s, t h e mas t er ca n ass e r t a r e p e a t s t a r t con - di t i on i m m e d i a t ely a f ter t h e f i n a l a c k and ca r r y o u t a sin g le- b y te re a d w i t h out a s s e r t i n g an i n te r m e d i a te stop c o nd i t i o n. wr i t e b y t e i n t h is o p era t io n, t h e mas t er de vice s e n d s a co mman d b y t e and o n e da t a b y t e t o t h e s l a v e de vic e , as fol l o w s: 1. the mast er de vi ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mast er s e nds t h e 7-b i t s l a v e addr ess fol l o w e d b y t h e wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vi ce ass e r t s a c k o n sd a. 4. the mast er s e nds a r e g i s t er addr es s. 5. the sla v e as s e r t s a c k o n sd a. 6. the master s e nds a da t a b y te. 7. the sla v e as s e r t s a c k o n sd a. 8. the mast er as s e r t s a s t o p con d i t io n o n sd a t o end t h e tra n sa cti o n . this is sh o w n i n f i gur e 21. 04711-021 slave address register address s w a data ap a 24 13 5 7 6 8 f i gure 21. sing l e -b yte write to a r e gis t er read opera t i o ns the ADT7466 us es th e f o l l o w in g s m b u s r e ad p r o t o c ols. re c e i v e by te this is us ef u l w h e n r e p e a t e d l y re adin g a si n g le r e g i s t er . th e r e g i s t er addr es s n e e d s t o ha v e b e en s e t u p p r e v i o us l y . i n t h is o p era t io n, t h e mas t er de vice r e ce i v es a s i n g le b y t e f r o m a sl a v e d e v i c e , as fol l o w s : 1. the mast er de vi ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mast er s e nds t h e 7-b i t s l a v e addr ess fol l o w e d b y t h e re a d bit ( h i g h ) . 3. the addr es s e d sla v e de vi ce ass e r t s a c k o n sd a. 4. the mast er r e cei v es a da t a b y t e . 5. the mast er as s e r t s n o a c k on s d a. 6. the mast er ass e r t s a st o p con d i t io n o n sd a and t h e tra n sa cti o n en ds. f o r t h e adt74 66, t h e r e ce i v e b y t e p r o t o c ol is us e d t o r e ad a s i ng l e b y te of d a t a f r om a re g i ste r w h o s e a d d r e s s w a s s e t p r e v i o u s l y by a s e n d by t e o r w r i t e by t e o p e r a t i o n . 04711-022 23 14 5 slave address s r data p a 6 a f i g u re 22. sing l e -b y t e r e ad f r om a r e g i s t er
ADT7466 rev. 0 | page 15 of 48 alert response address (ara) ara is a feature of smbus devices that allows an interrupting device to identify itself to the host when multiple devices exist on the same bus. the alert output can be used as an interrupt output, or it can be used as an alert . one or more outputs can be connected to a common alert line connected to the master. if a devices alert line goes low, the following occurs: 1. alert is pulled low. 2. the master initiates a read operation and sends the alert response address (ara = 0001 100). this is a general call address, which must not be used as a specific device address. 3. the device whose alert output is low responds to the alert response address, and the master reads its device address. the address of the device is now known, and it can be interrogated in the usual way. 4. if more than one devices alert output is low, the one with the lowest device address has priority, in accordance with normal smbus arbitration. 5. once the ADT7466 responds to the alert response address, the master must read the status registers, the alert is cleared only if the error condition no longer exists. smbus timeout the ADT7466 includes an smbus timeout feature. if there is no smbus activity for 25 ms, the ADT7466 assumes that the bus is locked, and it releases the bus. this prevents the device from locking or holding the smbus expecting data. some smbus controllers cannot handle the smbus timeout feature, so they are disabled. table 5. configuration register 1register 0x00 bit address and value description <5> todis = 0 smbus timeout enabled (default) <5> todis = 1 smbus timeout disabled voltage measurement the ADT7466 has two external voltage measurement channels. pin 11 and pin 12 are analog inputs with a range of 0 v to 2.25 v. it can also measure its own supply voltage, v cc . the v cc supply voltage measurement is carried out through the v cc pin (pin 6). setting bit 6 of configuration register 1 (0x00) allows a 5 v supply to power the ADT7466 and be measured without overranging the v cc measurement channel. a/d converter all analog inputs are multiplexed into the on-chip, successive approximation, analog-to-digital converter. this has a resolution of 10 bits. the basic input range is 0 v to 2.25 v, but the v cc input has built in attenuators to allow measurement of 3.3 v or 5 v. to allow for the tolerance of the supply voltage, the adc produces an output of 3/4 full scale (decimal 768 or 0x300) for the nominal supply voltage, and so has adequate headroom to cope with overvoltages. table 9 shows the input ranges of the analog inputs and the output codes of the adc. table 6. voltage measurement registers register description default 0x0a ain1 reading 0x00 0x0b ain2 reading 0x00 0x0c v cc reading 0x00 associated with each voltage measurement channel are high and low limit registers. exceeding the programmed high or low limit causes the appropriate status bit to be set. exceeding either limit can also generate alert interrupts. table 7. voltage measurement limit registers register description default 0x14 ain1 low limit 0x00 0x15 ain1 high limit 0xff 0x16 ain2 low limit 0x00 0x17 ain2 high limit 0xff 0x18 v cc low limit 0x00 0x19 v cc high limit 0xff when the adc is running, it samples and converts a voltage input in 1 ms, and averages 16 conversions to reduce noise. therefore a measurement on each input takes nominally 16 ms. turn off averaging for each voltage measurement read from a value register, 16 readings have actually been made internally and the results averaged, before being placed into the value register. there can be an instance where faster conversions are required. setting bit 4 of configuration register 2 (0x01) turns averaging off. this effectively gives a reading 16 times faster (1 ms), but as a result the reading can be noisier. single-channel adc conversions setting bit 3 of configuration register 4 (0x03) places the ADT7466 into single-channel adc conversion mode. in this mode, the ADT7466 can be made to read a single voltage channel only. if the internal ADT7466 clock is used, the selected input is read every 1 ms. the appropriate adc channel is selected by writing to bits 2:0 of configuration register 4 (0x03). table 8. single-channel adc conversions bits 2:0, reg. 0x03 channel selected 000 ain1 001 ain2 010 v cc
ADT7466 rev. 0 | page 16 of 48 reference voltage output the ADT7466 has a reference voltage of 2.25 v, which is available on pin 13 of the device. it can be used for scaling and offsetting the analog inputs to give different voltage ranges. it can also be used as an excitation voltage for a thermistor when the analog inputs are configured as thermistor inputs. see the temperature measurement section for more details. configuration of pin 11 and pin 12 pin 11 and pin 12 can be used for analog inputs, thermistor inputs, or connecting a second remote thermal diode. the ADT7466 is configured for thermistor connection by default. the device is configured for the different modes by setting the appropriate bits in the configuration registers. bits 6:7 of configuration register 3 (0x02) configure the device for either analog inputs or thermistor inputs. bit 7 of configuration register 2 (0x01) configures pin 11 and pin 12 for the connection of a second thermal diode. bits 2:3 of interrupt status register 2 (0x11) indicate either an open or short circuit on thermal diode 1 and diode 2 inputs. bits 4:5 of interrupt status register 2 (0x11) indicate either an open or short circuit on th1 and th2 inputs. it is advisable to mask interrupts on diode open/short alerts when in thermistor monitoring mode and to mask interrupts on thermistor open/short alerts when in rem2 mode. table 9. a-to-d output code vs. v in v cc 3.3 v v cc 5 v a in decimal binary <0.0172 <0.026 <0.0088 0 00000000 0.017C0.034 0.026C0.052 0.0088C0.0176 1 00000001 0.034C0.052 0.052C0.078 0.0176C0.0264 2 00000010 0.052C0.069 0.078C0.104 0.0264C0.0352 3 00000011 1.110C1.127 1.667C1.693 0.563C0.572 64 (? scale) 01000000 2.220C2.237 3.333C3.359 1.126C1.135 128 (? scale) 10000000 3.3C3.347 5C5.026 1.689C1.698 192 (? scale) 11000000 4.371C4.388 6.563C6.589 2.218C2.226 252 11111100 4.388C4.405 6.589C6.615 2.226C2.235 253 11111101 4.405C4.423 6.615C6.641 2.235C2.244 254 11111110 >4.423 >6.634 >2.244 255 11111111 table 10. mode configuration summary mode configuration register settings limits alerts 1 description thermistor mode default mode. mask interrupts on diode nc. (set bits 2:3 of reg. 0x13.) th1 register 0x02 bit 7 = 1 low: reg 0x14 high: reg 0x15 ool: reg. 0x10, bit 6 nc: reg. 0x11, bit 4 th2 register 0x02 bit 6 = 1 low: reg 0x16 high: reg 0x17 ool: reg. 0x10, bit 5 nc: reg. 0x11, bit 5 ain mode ensure that afc is not on. (clear bits 0:1 of afc configuration register 1, 0x05.) ain1 register 0x 02 bit 7 = 0 low: reg 0x14 high: reg 0x15 ool: reg. 0x10, bit 6 ain2 register 0x02 bit 6 = 0 low: reg 0x16 high: reg 0x17 ool: reg. 0x10, bit 5 remote 2 diode mode register 0x01 bit 7 = 1 low: reg 0x14 high: reg 0x15 ool: reg. 0x10, bit 6 nc: reg. 0x11, bit 3 mask interrupts on thermistor nc. (set bits 4:5 of reg. 0x13) and ain2 (bit 5 of reg. 0x12.) 1 ool = out of limit. nc = no connection.
ADT7466 rev. 0 | page 17 of 48 temperature measurement the ADT7466 has tw o de dica ted t e m p era t ur e m e as ur em en t cha nne ls, on e fo r m e as ur i n g t h e t e m p era t ur e o f a n o n -chi p b a nd ga p te m p e r a t ur e s e n s o r , and o n e fo r m e asur in g t h e t e m p era t ur e o f a r e m o t e dio d e , us ual l y lo ca t e d in t h e cp u . i n add i t i on, t h e a n a l o g in p u t cha n nels, ain1 and ain2, c a n b e r e co nf igur e d t o m e as ur e t h e t e m p era t ur e o f a s e co nd di o d e b y s e t t in g bi t 7 o f c o nf igura t ion reg i st er 2 (0x01), o r t o m e as ur e te m p e r atu r e u s i n g t h e r m i stor s b y s e tt i n g bit 6 an d / or bit 7 of c o nf igura t ion reg i st er 3 (0x02). series resistance c a ncellation p a rasi t i c r e sis t a n ce, s e e n i n s e r i es wi t h t h e r e mo t e di o d e betw een t h e d+ a nd d? in p u ts t o th e adt746 6, is ca us e d b y a va r i ety o f fac t o r s in cl ud in g pcb t r ack r e sist a n ce a nd t r ack len g t h . this s e r i es r e sis t a n ce a p p e a r s as a tem p era t ur e o f fs et i n t h e s e ns o r s t e m p era t ur e me as u r em e n t. this er r o r typ i cal l y ca us es a 1 c o f fs et p e r ohm o f p a rasi tic r e sis t a n ce in s e r i es wi t h t h e r e m o t e dio d e . th e a d t746 6 a u t o ma t i c a l l y ca nce l s t h e ef fe c t o f t h is s e r i es r e sis t a n c e o n t h e t e m p era t ure r e adi n g, g i v i ng a mo r e a c c u r a te r e su l t w i t h o u t t h e ne e d fo r u s er cha r a c ter i za t i on o f th e r e sis t an ce. the ad t7466 is desig n ed t o a u t o ma tical l y c a n c el t y pi c a l l y 2 k ? of re s i st an c e . t h i s i s d o ne t r ansp are n t l y to t h e us er , using an advan c e d t e m p era t ur e me as u r em e n t m e t h o d des c r i b e d i n t h e fol l o w in g s e c t i o n. temperature measurement method a sim p le met h o d o f m e as ur in g t e m p era t ur e is to explo i t t h e n e g a t i v e t e m p er a t ur e co ef f i cien t o f a dio d e , b y m e as ur in g t h e b a s e emi t t e r v o l t a g e (v be ) of a t r ans i stor op e r a t e d a t c o nst a n t c u r r en t. u n fo r t una t e l y , t h is t e chniq u e r e q u ir es cal i b r a t io n t o n u l l o u t t h e ef fe c t o f t h e a b s o l u te val u e o f v be , w h ich va r i es f r o m d evi ce t o d e v i ce . the t e c h niq u e us ed in t h e ad t7466 m e as ur es th e cha n g e in v be w h e n t h e de v i ce is o p er a t e d a t t h r e e dif f er en t c u r r en t s . p r ev i o us devi ces used o n l y t w o o p e r a t in g curr e n t s , b u t i t i s t h e th i r d curr e n t tha t allo w s se ri e s r e si s t a n ce ca n c e l la ti o n . fi g u r e 2 4 s h ow s t h e i n put s i g n a l c o n d it i o n i n g u s e d t o m e a s u r e t h e ou t p u t o f a rem o t e t e m p er a t ur e s e n s o r . this f i gur e s h o w s th e r e m o t e sen s o r a s a s u b s tra t e tra n si s t o r , p r o v i d ed f o r te m p e r atu r e mon i tor i n g on s o m e m i c r opro c e ss or s , but it c o u l d al so be a d i sc r e t e tra n s i s t o r . i f a d i sc r e t e tra n s i s t o r i s u s ed , th e c o l l e c tor i s not g r ou nd e d , a n d s h ou l d b e l i n k e d to t h e b a s e . t o p r e v en t g r o u n d n o is e f r o m i n t e r f er in g w i t h t h e m e as ur e m en t, t h e more n e g a t i ve te r m i n a l of t h e s e ns or i s not re f e re nc e d to g r o u n d b u t is b i as e d ab o v e g r o u nd b y an i n t e r n a l dio d e a t t h e dC i n p u t . i f t h e s e n s o r is o p era t in g i n a n ext r eme l y n o isy en vir o n m e n t, c 1 ma y o p t i o n a l ly b e ad de d as a n o is e f i lt er . i t s val u e sh o u l d n e v e r exceed 1000 pf . s e e th e l a yo u t c o n s ider a t io n s s e c t io n fo r m o re info r m a t io n on c1. to m e a s u r e v be , t h e o p era t i n g c u r r en t t h r o ug h t h e s e n s o r is s w itc h e d b e t w e e n t h re e re l a te d c u r r e n t s . f i g u re 2 4 show s n 1 i a nd n2 i as di f f er en t m u l t i p le s o f t h e c u r r en t i. the c u r r en ts t h r o ug h t h e t e m p era t ur e dio d e a r e sw i t ch e d b e tw e e n i and n1 i, g i vin g v be1 , a nd t h en b e tw e e n i and n 2 i, g i ving v be2 . th e tem p era t ur e can t h en b e calc u l a t e d usin g t h e tw o v be me as ur e m en ts. this m e t h o d can als o cance l t h e ef fe c t o f s e r i es r e sis t a n ce o n t h e t e m p er a t ur e m e as ur e m e n t. th e re su lt i n g v be wa vefo r m s a r e p a ss e d t h r o ug h a 65 k h z lo w-p a ss f i l t er t o r e m o ve n o is e, an d t h e n t o a ch op p e r - st ab i l i z e d a m plif ier . thi s a m plif ies an d r e c t if ies t h e w a v e fo r m t o p r o d uce a d c vo lt age prop or t i on a l to v be . t h e a d c d i gi tiz e s th i s v o l t a g e , and a t e m p era t ur e m e asur em e n t is p r o d uce d . t o r e d u ce t h e ef fe c t s o f n o is e , dig i t a l f i l t er i n g is p e r f o r m e d b y a v er a g in g t h e r e s u l t s o f 16 m e as ur emen t c y cles fo r lo w co n v ersio n r a t e s. sig n a l con d i t ionin g and m e asu r em e n t o f t h e i n ter n a l t e m p era t ur e s e ns o r is p e r f o r m e d i n t h e s a m e ma nn er . using disc rete trans i stors i f a di s c r e te t r an sisto r is us e d , t h e col l e c to r is no t g r o u n d e d and s h o u l d be link e d t o t h e bas e . i f a n np n tra n sisto r is us ed , the e m it te r i s c o n n e c te d to t h e d ? in p u t a n d t h e base t o t h e d + i n p u t . i f a pnp t r a n sis t o r is us ed, th e bas e is conn ec ted t o t h e d? in p u t an d t h e emi t t e r t o t h e d+ in p u t. f i g u r e 23 s h o w s h o w t o c o n n e c t the ADT7466 t o a n npn o r p n p tr a n sis t o r f o r t e m p era t ur e m e as ur em e n t . t o p r e v en t g r o u n d no is e in t e r f er in g wi t h t h e m e as urem e n t, t h e m o r e nega t i ve t e r m inal o f t h e s e ns o r i s not re fe re nc e d to g r ou n d , b u t i s bi a s e d a b o v e g r ou nd b y a n in t e r n al di o d e a t t h e d? in p u t. 04711-023 d+ d? ADT7466 2n3904 npn d+ d? ADT7466 2n3906 pnp f i g u re 23. con n ec t i ons f o r n p n and p n p t r ans i s t o r s 04711- 024 c1* d+ bias diode *capacitor c1 is optional. it should only be used in noisy environments. v dd to adc v out+ v out ? remote sensing t ransisto r d? i n1 i n2 i i bias low-pass filter f c = 65khz f i g u re 24. sig n al condit ion i ng f o r r e mo te d i od e t e m p e r at ure s e ns o r s
ADT7466 rev. 0 | page 18 of 48 temperature data format the temperature data stored in the temperature data registers consists of a high byte with an lsb size equal to 1c. if higher resolution is required, two additional bits are stored in the extended temperature registers, giving a resolution of 0.25c. the temperature measurement range for both local and remote measurements is, by default, 0c to 127c (binary), so the adc output code equals the temperature in degrees celsius, and half the range of the adc is not actually used. the ADT7466 can also be operated by using an extended temperature range from ?64c to +191c. in this case, the whole range of the adc is used, but the adc code is offset by +64c, so it does not correspond directly to the temperature. (0c = 0100000) . the user can switch between these two temperature ranges by setting or clearing bit 7 in configuration register 1. the measurement range should be switched only once after power- up, and the user should wait for two monitoring cycles (approximately 68 ms) before expecting a valid result. both ranges have different data formats, as shown in table 11. table 11. temperature data format temperature binary 1 offset binary 2 ?64c 0 000 0000 0 000 0000 0c 0 000 0000 0 100 0000 1c 0 000 0001 0 100 0001 10c 0 000 1010 0 100 1010 25c 0 001 1001 0 101 1001 50c 0 011 0010 0 111 0010 75c 0 100 1011 1 000 1011 100c 0 110 0100 1 010 0100 125c 0 111 1101 1 011 1101 127c 0 111 1111 1 011 1111 191c 0 111 1111 1 111 1111 1 binary scale temperature measurement returns 0 for all temperatures 0c. 2 offset binary scale temperature values are offset by +64. while the temperature measurement range can be set to ?64c to +191c for both local and remote temperature monitoring, the ADT7466 itself should not be exposed to temperatures greater than those specified in the absolute maximum ratings table. furthermore, the device is guaranteed to only operate at ambient temperatures from ?40c to +125c. in practice, the device itself should not be exposed to extreme temperatures, and may need to be shielded in extreme environments to comply with these requirements. only the remote temperature monitoring diode should be exposed to temperatures above +120c and below ?40c. care should be taken in choosing a remote temperature diode to ensure that it can function over the required temperature range. nulling out temperature errors the ADT7466 automatically nulls out temperature measurement errors due to series resistance, but systematic errors in the temperature measurement can arise from a number of sources, and the ADT7466 can reduce these errors. as cpus run faster, it is more difficult to avoid high frequency clocks when routing the d+, d? tracks around a system board. even when recommended layout guidelines are followed, there may still be temperature errors attributed to noise being coupled onto the d+/d? lines. high frequency noise generally has the effect of giving temperature measurements that are too high by a constant amount. the ADT7466 has temperature offset registers at addresses 0x26 and 0x27 for the remote and local temperature channels. a one time calibration of the system can determine the offset caused by system board noise and null it out using the offset registers. the offset registers automatically add a twos complement 8-bit reading to every temperature measurement. the lsb adds 1c offset to the temperature reading so the 8-bit register effectively allows temperature offsets of up to 128c with a resolution of 1c. this ensures that the readings in the temperature measurement registers are as accurate as possible. table 12. temperature offset registers register description default 0x24 thermistor 1/remote 2 offset 0x00 (0c) 0x25 thermistor 2 offset 0x00 (0c) 0x26 remote1 temperatur e offset 0x00 (0c) 0x27 local temperature offset 0x00 (0c) table 13. temperature measurement registers register description default 0x0d remote temperature 0x00 0x0e local temperature 0x00 0x08 extended resolution 1 0x00 bits 1:0 remote temperature lsbs 0x09 extended resolution 2 0x00 bits 1:0 local temperature lsbs associated with each temperature measurement channel are high and low limit registers. exceeding the programmed high or low limit causes the appropriate status bit to be set. exceeding either limit can also generate alert interrupts. table 14. temperature measurement limit registers register description default 0x1a remote1 temperature low limit 0x00 0x1b remote1 temperature high limit 0x7f 0x1c local temperature low limit 0x00 0x1d local temperature high limit 0x7f 0x14 thermistor 1/remote 2 low limit 0x00 0x15 thermistor 1/remote 2 high limit 0xff 0x16 thermistor 2 low limit 0x00 0x17 thermistor 2 high limit 0xff
ADT7466 rev. 0 | page 19 of 48 al l te m p er a t ur e limi ts m u st b e p r o g ra mm e d i n t h e s a me fo r m a t as t h e t e m p era t ur e m e as ur eme n t. i f t h is is o f fs et b i na r y , add 6 4 (0x40 o r 010000 00) t o th e ac t u al t e m p era t ur e limi t in deg r ees ce l s i u s . layout c o ns id er ations d i gi t a l boa r d s ca n b e e l ectricall y n o i s y e n v i r o nm en t s . t a k e t h e f o l l o w i n g pre c aut i ons to prote c t t h e an a l o g i n put s f r om noi s e, p a r t ic u l a r l y w h en m e as ur i n g t h e v e r y smal l v o l t a g es f r o m a re mote d i o d e s e ns or . p l ace t h e ad t7 466 as c l os e as p o s s i b le t o the r e m o t e s e n s in g dio d e . p r o v ide d tha t t h e w o rs t n o is e s o ur ces, suc h as c l o c k gen e r a to rs, d a t a /ad d r e ss b u s e s and cr t s , a r e a v o i de d , t h is dis t an c e can b e 4 in ch es t o 8 in ch es. i f t h e dist an ce to t h e r e m o te s e n s o r is m o r e t h an 8 i n ch es, t h e us e o f t w ist e d-p a ir ca b l e is r e commende d . this w o rks f r o m a b o u t 6 f e et t o 12 f e et. f o r v e r y lo n g dis t an ces (u p t o 1 00 f e et), us e s h ie lde d twis t e d p a ir , s u c h as b e l d en #8451 micr o p h o n e cab l e . c o nn ec t t h e t w i s te d p a i r to d + and d ? a n d t h e sh i e l d to g n d cl o s e to t h e ADT7466. l e a v e the r e m o t e end o f the s h ie l d u n co nn ec t e d t o a v oi d g r ou n d l o op s . b e ca us e t h e m e as ur em e n t t e chniq u e us es s w i t ch e d c u r r en t s o ur ces, exces s i v e ca b l e and/o r f i l t er ca p a ci t a n c e ca n a f fe c t t h e m e as ur e m en t. w h en usi n g lo ng ca b l es, t h e f i l t er ca p a ci t o r co u l d b e re d u c e d or re mo ve d. ro u t e t h e d+ and d? t r acks cl os e t o g e t h er , in p a ral l e l , w i t h g r o u n d e d gua r d t r acks o n e a ch side. pr o v ide a g r o u n d plan e un de r th e tra c ks i f pos s i b le . u s e wid e t r acks t o mini mi ze i n d u c t an ce and r e d u ce n o is e p i ck u p . a 5 mi l t r ack mi ni m u m wi d t h an d sp ac in g is r e co mm e nde d . 5mil 5mil 5mil 5mil 5mil 5mil 5mil gnd d+ gnd d? 04711-044 f i gure 2 5 . a r r a ngem ent o f s i gnal t r acks t r y t o minimi ze t h e n u m b er o f co p p er/s older j o in ts, w h ich can ca us e t h er m o cou p le ef fe c t s. w h er e co p p er/s older jo in ts a r e u s e d , m a k e s u r e t h a t th e y a r e i n b o th th e d + a n d d ? pa t h s a n d a r e a t t h e s a me tem p er a t ur e . ther m o co u p le ef f e c t s s h o u ld no t be a ma jo r p r ob lem be c a us e 1c co r r es p o n d s t o a b o u t 240 v , an d t h er m o c o u p le v o l t a g es a r e a b o u t 3 v/ c o f t e m p era t u r e dif f er en ce . u n les s t h er e a r e tw o t h er m o co uples wi t h a b i g tem p er a t ur e dif f er en t i al b e tw e e n th em, t h er m o cou p le v o l t a g es sho u ld be m u ch les s tha n 200 mv . p l ace a 0.1 f b y p a s s ca p a ci t o r c l os e t o the ADT7466. temperature measurement using thermistors t h e an a l o g i n put ch an nel s , a i n 1 a n d a i n 2 , c a n b e u s e d to m e as ur e t e m p er a t ur e b y usin g nega t i v e t e m p era t ur e co ef f i cien t ( n tc ) t h e r m i s t or s . ntc t h er mist o r s ha ve a nonl i n e a r t r an sfer fun c ti o n o f th e f o rm ? ? ? ? ? ? ? ? ? = w h er e: r t2 is t h e r e sis t an ce a t tem p era t ur e t2 . r t1 is t h e r e sis t an ce a t tem p era t ur e t1 ( u su a l ly 2 5 c ) . e = 2.71828. b is t h e b co ns t a n t o f t h e t h er mis t o r (typ ical l y betw een 3000 a nd 5000). a ther mis t o r can b e made t o g i v e a v o l t a g e o u t p u t tha t is fa irl y line a r o v er a li mi te d r a n g e b y ma k i ng i t p a r t o f a p o te n t ia l divid e r as sh o w n i n f i gur e 26. a po t e n t i a l d i v i d e r , w i th a th e r m i s t o r a s th e u p pe r pa rt co nn e c t e d t o r e fo u t , p r o d uc es a n o u t p u t v o l t a g e t h a t va r i es non l i n e a r l y i n prop or t i on to t h e i n ve r s e of t h e r e s i st anc e . by sui t ab le ch o i ce o f t h er misto r a nd f i xe d r e sisto r , t h is can b e ma de to a ppro x i m a t ely c a nc el t h e non l i n e a r i t y of t h e t h e r mi stor r e sis t a n ce v s . t e m p era t ur e c u r v e , t h us g i vi n g a fa irl y lin e a r o u t p ut v o l t a g e wi t h t e m p era t u r e o v er a limi t e d ra n g e . this cir c ui t us es ref o ut as t h e exci t a t i on v o l t a g e for b o t h t h e t h er mi sto r a nd fo r t h e ad c, s o a n y va r i a t ion i n ref o u t is ca nce l le d , an d t h e m e as ur e m en t is p u r e l y ra t i om et r i c . 04711-025 th1 refout th2 ADT7466 th2 r ext 2 th1 r ext 1 f i gu r e 2 6 . t e m p er atu r e mea s ur em e n t usi n g t h er mi st or
ADT7466 rev. 0 | page 20 of 48 thermistor linearization a lin e a r tra n sf e r fun c ti o n ca n b e o b ta in ed o v e r a li mi t e d t e m p era t ur e ra ng e b y co nn e c t i ng t h e t h er mis t o r in s e r i es w i t h an opt i m u m re s i stor . pl a c i n g a re s i stor i n s e r i e s w i t h t h e th er mis t o r as sho w n in f i gur e 2 6 p r o d uces a n s - s h a p ed er r o r c u r v e as s h o w n in f i gur e 27. the o v eral l er r o r acr o s s t h e ra n g e ca n be r e d u ced b y calc u l a t in g t h e ext e r n al r e sis t o r s o tha t t h e er r o r is 0 a t th e en ds o f t h e ra n g e . r ext is calc u l a t ed as f o l l o w s: ) 2 ( ) 2 ( ) ( mid max min max min max min mid ext r r r r r r r r r ? + ? + = w h er e: r mi n is t h e t h er mis t o r val u e a t t min . r ma x is t h e t h er mis t o r val u e a t t max . r mid is t h e t h er mis t o r val u e a t 2 max min t t + f i gur e 27 sh o w s th e l i n e a r i t y er r o r usin g a 100 k? th er mist o r wi th a b val u e o f 3500 a n d a 14 400 ? r e sis t o r . u s in g t h e s p e c if ie d t h er mis t o r a nd r e sis t or , t h e er r o r o v er a t e m p era t ur e ra n g e o f 30c to 100c is les s t h a n 2c. o t h e r th er mist o r s can b e us e d , b u t t h e r e sis t o r val u e is dif f er en t. a smal ler er r o r ca n b e achie v e d o v e r a na r r o w er t e m p era t ur e ra n g e; co n v ers e l y , a wi der t e m p era t ur e ra n g e ca n b e us e d , b u t t h e e r r o r is gr e a t e r . i n b o t h cas e s , t h e o p t i m u m r e sis t o r val u e is dif f er en t. 2 1 0 ?1 ?2 30 40 50 60 70 80 90 100 04711-026 temperature ( c) e rror ( c) f i gure 27. lin e a r it y e rror u s ing spe c ifi e d co mponents thermistor n o rmaliz ation e v en w h e n t h e t h er mist o r is line a r ize d , i t do es n o t p r o v i d e an o u t p ut t o t h e a d c t h a t g i v e s a dir e c t tem p era t ur e r e ading i n d e g r e e s c e l s iu s . t h e l i ne ar i z e d d a t a i s prop or t i on a l to t h e v o l t a g e a p plie d; h o we v e r , n o r m a l iza t io n is n e e d e d t o us e t h e val u e as a t e m p era t ur e r e adi n g. t o o v er co m e t h is p r ob lem, w h en a n a n alog in p u t is co nf igur ed fo r us e wi t h a t h er mis t o r , t h e o u t p u t o f t h e ad c is s c ale d an d o f fs et s o t h a t i t p r o d uces t h e s a m e o u t p u t (fo r exa m ple , 1 ls b = 0.25c) as f r o m t h e t h er mal dio d e i n p u t, w h e n r ext is ch os en to linea r ize t h e ther mis t o r o v er 30c t o 100c. n o r m aliza t io n ca n be ch os en f o r 10 k? th er mis t o r s b y s e t t in g b i t 0 o f c o nf igu r a t io n reg i st er 2 (0x01) o r f o r 100 k? th e r m i s t o r s b y clea ri n g th i s b i t (d e f a u l t set t in g). reading temperature from the ADT7466 i t is im p o r t a n t to n o t e t h a t t e m p era t ur e can b e r e ad f r o m t h e ADT7466 as a n 8-b i t val u e (wi t h 1c r e s o l u tion) o r as a 10-b i t val u e ( w i t h 0.25 c r e s o l u tio n ). i f o n l y 1c r e s o l u tio n is r e q u ir e d , t h e t e m p era t ur e r e adi n gs ca n b e r e ad a t an y t i m e a nd i n n o p a r t ic u l a r o r der . i f t h e 10- b i t me asur em e n t is r e q u ir e d , t h is i n volv es a 2-r e g i st e r r e ad fo r e a ch me as ur emen t. the ext e n d e d r e s o l u t i o n r e g i st ers (0x08 and 0x09) sho u l d b e read f i rs t . this c a u s es al l te m p er a t ure r e ading r e g i s t ers t o b e f r oze n u n t i l al l tem p era t ur e r e ading r e g i s t ers ha ve b e en r e ad. this pr e v en ts an ms b r e adin g fr o m b e in g u p da t e d w h ile i t s 2 ls bs a r e b e in g r e ad a n d vi ce v e rs a . meas ur em ent se qu enc e the ADT7466 a u t o ma tical l y m e as ur es eac h a n alog a n d t e m p era t ur e cha nne l i n t h e fol l o w in g r o u n d-r o b i n s e q u e n c e : 1. ain1/ t h1 2. ain2(th2) 3. v cc 4. re m o te t e m p er a t ur e 1 (d1) 5. l o c a l t e m p era t ur e i f ain1 and ai n2 a r e co nf igur e d fo r a s e co nd t h er ma l dio d e, t h is is me asur e d in ste a d o f t h e ain1 and ai n 2 m e a s ur emen t s , a nd t h e r e s u l t sto r e d in t h e ai n1 r e adin g reg i s t er (0x0a).
ADT7466 rev. 0 | page 21 of 48 analog monitoring cycle time the analog monitoring cycle begins when a 1 is written to the start bit (bit 0) of configuration register 1 (0x00). the adc measures each analog input in turn, and, as each measurement is completed, the result is automatically stored in the appropriate value register. this round-robin monitoring cycle continues until disabled by writing a 0 to bit 0 of configuration register 1. since the adc is normally left to free-run in this manner, the time to monitor all the analog inputs is normally not of interest, because the most recently measured value of any input can be read at any time. for applications where the monitoring cycle time is important, it can easily be calculated from the measurement times of the individual channels. with averaging turned on, each measurement is taken 16 times and the averaged result is placed in the value register. the worst-case monitoring cycle times for averaging turned on and off is described in table 15. fan tach measurements are made in parallel but independently and are not synchronized with the analog measurements. table 15. monitoring cycle time monitoring cycle time channel avg on avg off local temperature remote 1 temperature remote 2 temperature ain1/thermistor 1 ain2/thermistor 2 v cc 8.99 ms 36.69 ms 36.69 ms 8.65 ms 8.65 ms 8.26ms 1.36 ms 6.25 ms 6.25 ms 1.02 ms 1.02 ms 0.61ms total 1 71.24 ms 10.26ms total 2 90.63 ms 14.47 ms 1 pin 11 and pin 12 configured for ai n/thermistor monito ring. the total excludes the remote 2 temperature time. 2 pin 11 and pin 12 configured for second thermal diode monitoring. the total excludes the ain1/thermistor 1 and ain2/thermistor 2 times. additional adc functions a number of other functions are available on the ADT7466 to offer the systems designer increased flexibility. turn off averaging for each temperature measurement read from a value register, 16 readings have actually been made internally and the results averaged before being placed into the value register. the user may want to take a very fast measurement, for example, of cpu temperature. setting bit 4 of configuration register 2 (0x01) turns averaging off. single-channel adc conversions setting bit 3 of configuration register 4 (address 0x03) places the ADT7466 into single-channel adc conversion mode. in this mode, the ADT7466 can be made to read a single temperature channel only. the selected input is read every 1.4 ms. the appropriate adc channel is selected by writing to bits 2:0 of configuration register 4 (address 0x03). table 16. adc single-channel selection bits 2:0, reg. 0x03 channel selected 000 ain1/ thermistor1 001 ain2/ thermistor2 010 v cc 011 remote 1 temperature 100 local temperature 101 remote 2 temperature limit values high and low limits are associated with each measurement channel on the ADT7466. these limits can form the basis of system status monitoring; a status bit can be set for any out-of- limit condition and detected by polling the device. alternatively, alert interrupts can be generated to flag out-of-limit conditions for a processor or microcontroller. voltage and temperature limits are only 8-bit values and are compared with the 8 msbs of the voltage and temperature values. 8-bit limits the following tables list the 8-bit limits on the voltage limit and temperature limit registers of the ADT7466. table 17. voltage limit registers register description default 0x14 ain1 low limit 0x00 0x15 ain1 high limit 0xff 0x16 ain2 low limit 0x00 0x17 ain2 high limit 0xff 0x18 v cc low limit 0x00 0x19 v cc high limit 0xff table 18. temperature limit registers register description default 0x1a remote temperature low limit 0x00 0x1b remote temperature high limit 0x7f 0x1c local temperature low limit 0x00 0x1d local temperature high limit 0x7f 0x1e prochot limit 0x00 0x1f ain1(th1)/rem2 therm limit 0x64 0x20 ain2(th2) therm limit 0x64 0x21 remote therm limit 0x64 0x22 local therm limit 0x64
ADT7466 rev. 0 | page 22 of 48 16-bit limits the fan tach measurements are 16-bit results. the fan tach limits are also 16 bits, consisting of a high byte and low byte. since fans running under speed or stalled are normally the only conditions of interest, only high limits exist for fan tachs. since the fan tach period is actually being measured, exceeding the limit indicates a slow or stalled fan. table 19. fan limit registers register description default 0x4c tach1 minimum low byte 0xff 0x4d tach1 minimum high byte 0xff 0x4e tach2 minimum low byte 0xff 0x4f tach2 minimum high byte 0xff out-of-limit comparisons once all limits have been programmed, ADT7466 monitoring can be enabled. the ADT7466 measures all parameters in round- robin format and sets the appropriate status bit for out-of-limit conditions. comparisons are done differently depending on whether the measured value is being compared to a high or low limit. a greater than comparison is performed when comparing with the high limit. a less than or equal to comparison is performed when comparing with the low limit. status registers the results of limit comparisons are stored in status register 1 and status register 2. the status register bit for each channel reflects the status of the last measurement and limit comparison on that channel. if a measurement is within limits, the corre- sponding status register bit is cleared to 0. if the measurement is out-of-limits the corresponding status register bit is set to 1. the state of the various measurement channels can be polled by reading the status registers over the serial bus. when bit 7 (ool) of status register 1 (0x10) is 1, an out-of-limit event has been flagged in status register 2. therefore the user need only read status register 2 when this bit is set. alternatively, the alert output (pin 14) can be used as an interrupt, which automatically notifies the system supervisor of an out-of-limit condition. reading the status registers clears the appropriate status bit as long as the error condition that caused the interrupt has cleared. status register bits are sticky, meaning that they remain set until read by software. whenever a status bit is set, indicating an out-of-limit condition, it remains set even if the event that caused it cleared (until read). the only way to clear the status bit is to read the status register when the event clears. interrupt status mask registers (0x12, 0x13) allow individual interrupt sources to be masked from causing an alert . however, if one of these masked interrupt sources goes out-of- limit, its associated status bit is set in the interrupt status registers. table 20. interrupt status register 1 (reg. 0x10) bit no. name description 7 ool 1 indicates that a bit in status register 2 is set and that status register 2 should be read. 6 ain1 1 indicates that ain1 is out of limit. 5 ain2 1 indicates that ain2 is out of limit. 4 vcc 1 indicates that v cc is out of limit. 3 rem 1 indicates that the remote temperature measurement is out of limit. 2 loc 1 indicates that the local temperature measurement is out of limit. 1 fan1 1 indicates that the tach 1 count is above limit (fan speed below limit). 0 fan2 1 indicates that the tach 2 count is above limit (fan speed below limit). table 21. interrupt status register 2 (reg. 0x11) bit no. name description 5 thrm2 1 indicates that th1 is open-circuit. 4 thrm1 1 indicates that th2 is open-circuit. 3 d2 1 indicates that remote temperature sensing diode 2 is open-circuit or short- circuit. 2 d1 1 indicates that remote temperature sensing diode 1 is open-circuit or short- circuit. 1 phot 1 indicates that the prochot limit has been exceeded. 0 ovt 1 indicates that a therm overtemperature limit has been exceeded.
ADT7466 rev. 0 | page 23 of 48 alert interrupt behavior the ADT7466 c a n b e p o l l ed f o r s t a t us, o r a n aler t in t e r r u p t ca n b e ge n e ra t e d fo r o u t-o f -lim i t con d i t io n s . i t is im p o r t an t t o not e h o w t h e aler t o u t p u t an d sta t us b i ts b e ha v e w h en wr i t in g i n ter r u p t ha ndler s o f t war e . 04711-027 high limit temperature sticky status bit temp back in limit (status bit stays set) cleared on read (temp below limit) alert f i g u re 28. aler t and stat us bit be havior fi g u r e 2 8 s h ow s h o w t h e aler t ou t p ut and st ic ky st a t u s b i ts b e ha ve . o n ce a limi t is exce e d e d , t h e co r r es p o ndin g s t a t us b i t is s e t t o 1. the st a t us b i t r e ma ins s e t u n t i l t h e er ro r co n d i t io n s u bsi d es an d t h e s t a t us r e g i s t er is r e ad . this en sur e s t h a t a n ou t - o f -limi t e v e n t c a nn ot b e miss e d if s o f t wa r e is p o l l in g t h e de vi ce pe ri odi c all y . th e aler t o u t p u t r e m a in s lo w w h ile a r e a d in g i s o u t - o f - l im i t , un til th e s t a t us r e g i s t e r i s r e a d . t h is h a s i m p l ica - t i ons on how s o f t w a re h a n d l e s t h e i n te r r upt . han d ling alert interrupts t o p r ev e n t t h e sys t e m f r o m bein g ti ed u p se r v ici n g in t e rr u p t s , i t is r e co mm e nde d to han d le t h e aler t in t e r r u p t as fol l o w s: 1. de t e ct th e aler t ass e r t io n. 2. e n te r t h e i n te r r upt h a nd l e r . 3. re ad t h e sta t us r e g i s t ers t o ide n tif y th e in ter r u p t s o ur ce . 4. m a s k t h e i n t e r r u p t s o ur ce b y s e t t i n g t h e a p p r o p r i a t e mask b i t in t h e in t e r r u p t mask r e g i s t ers (0x12, 0x13) . 5. t a k e t h e a p p r o p r i a t e ac t i on fo r a g i ven in t e r r u p t s o ur ce. 6. ex i t th e in t e rr u p t h a n d l e r . 7. p e r i o d i c a l ly p o l l t h e st a t u s re g i s t e r s . i f t h e i n te r r u p t st a t u s b i t has cl e a r e d , r e s e t t h e co r r esp o ndi n g i n t e r r u p t mask b i t t o 0. this c a us es th e aler t o u t p u t and st a t us b i ts to b e ha ve as sh o w n in f i gur e 29. 04711-028 high limit temperature sticky status bit temp back in limit (status bit stays set) interrupt mask bit set alert cleared on read (temp below limit) interrupt mask bit cleared (alert rearmed) f i gure 2 9 . ho w m a sk i n g the interrupt so ur c e a ffects aler t ou t p u t m a sk i n g i n te rr u p t s o ur ce s i n ter r u p t m a sk reg i st ers 1 an d 2 a r e lo ca t e d a t a ddr ess e s 0x12 a nd 0x 13. t h es e r e g i sters a l lo w i ndivi d u a l in ter r u p t s o ur ces to be mas k e d t o p r ev en t aler t in t e r r u p t s . m a sk in g an i n t e r r u p t so ur ce p r ev en t s o n l y th e aler t output f r om b e i n g a s s e r t e d ; t h e a p p r o p r i a t e s t a t us b i t is s e t as n o r m al . table 22. i n ter r upt mask r e gister 1 (reg. 0 x 1 2 ) bit no. name description 7 ool 1 masks alert for any alert condition flagged in statu s register 2. 6 ai n1 ( t h1 )/ re m2 1 masks alert for ain 1 (th1 )/rem2. 5 ain2( t h2) 1 masks alert for ain 2 (th2 ). 4 v c c 1 masks alert for vcc. 3 rem1 1 masks alert for remote temperature. 2 l o c 1 masks alert for local temperature. 1 f a n 1 1 masks alert for fan 1. 0 fan2 1 masks alert for fan 2. table 23. i n ter r upt mask r e gister 2 (reg. 0 x 1 3 ) bit no. name description 5 t h r m 2 1 masks alert for t h 1 open- or s h ort- circuit errors. 4 thrm1 1 masks th2 open- or short-cir c uit errors. 3 d 1 1 masks alert for diode 1 open- or sh ort- circuit errors. 2 d2 1 masks alert for diode 2 open- or sh ort- circuit errors. 1 p h o t 1 masks alert for prochot . 0 ovt 1 masks alert for over temperature (exceeding ther m limi ts).
ADT7466 rev. 0 | page 24 of 48 meas uring prochot assertion time the ADT7466 has a n in t e r n al t i mer t o meas ure pro c h o t ass e r t io n t i me. the t i m e r is st ar t e d o n t h e ass e r t io n o f t h e ADT7466 pro c h o t i n put , a n d s t opp e d o n t h e ne g a t i on of t h e pin. th e t i m e r co u n ts pro c h o t ti m e s cum u la ti v e l y , th a t i s , th e tim e r r e sum e s co un tin g o n t h e n e xt pro c h o t ass e r t io n. the pro c h o t ti m e r co n t in ue s t o a c cum u la t e pro c h o t a s se r t i o n tim e s un til t h e t i m e r is r e a d (i t i s c l ea r e d on re a d ) or u n t i l it re a c he s f u l l s c a l e. i f t h e c o u n te r re a c he s f u l l s c ale , i t st o p s a t tha t r e ading un t i l i t is c l e a r e d . the 8- b i t pro c h o t tim e r r e g i s t er (0x0f) is desig n ed s u ch t h a t bi t 0 is s e t to 1 o n t h e f i rst pro c h o t ass e r t io n. o n ce t h e cu m u la ti v e pro c h o t as s e r t io n tim e exce eds 50 m s , b i t 1 o f th e pro c h o t t i m e r is s e t, a nd bi t 0 b e com e s t h e ls b o f t h e tim e r wi t h a r e s o l u tio n o f 22.76 m s . 04711-029 7 6 5 4 3 2 1 0 00 000001 prochot prochot timer (reg. 0x0f) prochot asserted < or = 25ms prochot accumulate prochot low assertion times 7 6 5 4 3 2 1 0 00 000010 prochot timer (reg. 0x0f) prochot asserted > or = 50ms prochot accumulate prochot low assertion times 7 6 5 4 3 2 1 0 00 000101 prochot timer (reg. 0x0f) prochot asserted > or = 125ms (100ms + 25ms) f i g u re 30. pr o c ho t tim e r fi g u r e 3 0 s h ow s h o w t h e pro c h o t ti m e r b e h a v e s a s t h e pro c h o t in p u t is ass e r t e d an d nega t e d . bi t 0 is s e t on t h e f i rst pro c h o t ass e r t io n t h a t i s det e c t e d . this b i t r e main s s e t un t i l th e c u m u la ti v e pro c h o t as s e r t io n s excee d 50 m s . a t t h is tim e , b i t 1 o f th e pro c h o t t i m e r is s e t, and bi t 0 is cle a re d . bit 0 n o w re f l e c t s t i me r re a d i n g s w i t h a re s o lut i on of 2 5 ms . whe n u s i n g t h e pro c h o t ti m e r , be a w a r e o f th e f o llo w i n g. af t e r a pro c h o t tim e r r e a d (0x0f): ? the co n t en ts o f t h e t i m e r a r e cle a r e d o n r e ad . ? the p h o t b i t (bi t 1) o f s t a t us reg i st er 2 is cle a r e d au t o m a t i c a l l y . if t h e pro c h o t t i m e r is re ad d u r i n g a pro c h o t ass e r t io n, t h e fol l o w in g ha p p en s: ? the co n t en ts o f t h e t i m e r a r e cle a r e d . ? bi t 0 of t h e pro c h o t timer is s e t t o 1 (sin ce a pro c h o t ass e r t io n is o c c u r r in g). ? the pro c h o t ti m e r in cr em en t s f r o m 0. ? if t h e pro c h o t limi t (0x 1 e) = 0x00, t h e ph ot b i t is s e t. generating alert in terrupts from prochot events the ADT7466 c a n g e n e ra te aler t s w h e n a p r o g ra mma b l e pro c h o t limi t is exce e d e d . this al lo ws t h e sys t e m s desig n er t o ig n o r e b r ief, i n f r e q uen t pro c h o t ass e r t io n s , w h i l e ca p t ur in g lon g er pro c h o t ev e n t s th a t co ul d s i gn i f y a m o r e s e r i o u s t h er mal p r ob lem wi t h in t h e sys t em. r e g i s t er 0x1e is t h e pro c h o t limi t r e g i s t er . this 8-b i t r e g i s t e r al lo ws a limi t f r o m 0 s e co n d s (f irs t pro c h o t as s e r t io n) t o 6. 4 s e co n d s t o b e s e t be f o r e a n aler t is gener a te d. t h e pro c h o t tim e r v a l u e i s co m p a r ed wi t h th e co n t en ts o f t h e pro c h o t limi t r e g i s t er . i f th e pro c h o t tim e r v a l u e e x ceed s th e pro c h o t limi t v a l u e , t h e p h ot b i t ( b i t 1) o f s t a t us reg i st er 2 is s e t, a nd a n aler t is g e n e ra t e d . th e p h ot b i t (b i t 1 ) o f m a s k reg i s t er 2 (0x13) masks aler t s if t h is b i t is s e t t o 1, a l t h o u g h t h e ph ot b i t o f i n ter r u p t s t a t us reg i st er 2 is st i l l s e t if t h e pro c h o t limi t is e x ceed ed . f i gur e 32 is a f u n c t i o n a l b l o c k d i a g ra m o f t h e pro c h o t ti m e r limi t an d as s o c i a t e d cir c ui tr y . w r i t in g a val u e o f 0x00 t o th e pro c h o t limi t r e g i s t er (0 x21) ca us es aler t to b e ge ne r a te d on t h e f i r s t pro c h o t ass e r t io n. a pro c h o t limi t v a l u e o f 0x01 g e n e ra t e s a n aler t wh en cum u la ti v e pro c h o t as s e r t io n s excee d 50 m s .
ADT7466 rev. 0 | page 25 of 48 configuring the ADT7466 therm pin as an output if pro c h o t m o n i to r i n g i s n o t r e q u ir e d , pin 7 can b e conf ig- ur e d as a therm o u t p ut b y s e t t in g bi ts 1:0 o f c o nf igura t io n r e g i st er 3 t o 0 1 . the u s er c a n p r ep r o g r am sy s t e m cr i t i c al t h er mal limi ts. i f t h e t e m p era t ur e exce e d s a t h er mal l i mi t b y 0.25c, therm as s e r t s lo w . i f t h e tem p era t ur e is s t i l l ab o v e t h e t h er mal l i m i t on t h e ne x t mon i tor i ng c y cl e, therm st a y s l o w . therm r e ma in s ass e r t e d lo w u n til t h e tem p er a t ur e is e q ual t o o r be lo w t h e t h er mal li mi t. si n c e t h e t e m p era t ur e fo r t h a t cha n n e l is m e as ur ed o n l y ev e r y m o n i t o rin g c y c l e , o n ce therm ass e r t s, i t i s g u ar an te e d to re mai n l o w for a t l e a s t one moni tor i ng c y cl e. the therm p i n can b e co nf igur e d to ass e r t lo w if t h e t h 1, th 2 , e x te r n a l or i n te r n a l te m p e r a t u r e therm limi ts a r e e x ceed ed b y 0. 25 c . th e therm limi t r e g i s t ers a r e a t lo ca t i o n s 0x1f , 0x20, 0x2 1 , a nd 0x22, r e s p ec ti ve l y . fi g u r e 3 2 s h ow s h o w t h e therm p i n ass e r t s lo w as a n o u t p ut in t h e e v e n t o f a cr i t ical o v er t e m p era t ur e . 04711-030 therm limit 25 c therm limit temp therm ADT7466 monitoring cycle f i gure 3 1 . a sser t i n g therm as an o u t p ut b a s e d on t r ip p i ng therm limits 04711-031 7 6 5 4 3 2 1 0 25ms 50ms 100ms 200ms 400ms 800ms 1.6s 3.2s prochot smbalert 0 1 2 3 4 5 6 7 25ms 50ms 100ms 200ms 400ms 800ms 1.6s 3.2s prochot timer cleared on read prochot timer (reg. 0x0f) prochot limit (reg. 0x1e) comparator in out latch reset phot bit 1 mask register 2 (reg. 0x13) 1 = mask cleared on read status register 2 pcht bit (bit 1) f i g u re 32. f u nc t i o n al d i ag r a m of t h e a d t7 46 6 pr o c ho t mon i to ri ng circuitr y
ADT7466 rev. 0 | page 26 of 48 fan dri v e the ADT7466 c o n t a i n s tw o d a cs t o co n t r o l fan s p ee d . th e f u l l -s cale o u t p u t o f th es e d a cs is typ i cal l y 2.2 v @ 2 ma, s o t h e y m u s t b e b u f f er e d in o r der t o dr i v e 5 v o r 12 v fa n s . the o u t p ut v o l t a g e of t h es e d a c s is co n t r o l l e d b y da t a wr i t t e n t o t h e d r ive1 (0x40) a nd d r ive2 (0 x41) r e g i s t ers. since fa ns do no t t u r n on b e lo w a cer t a i n dr i v e vol t a g e, a s i g n i f i c a n t prop or t i on of t h e d a c r a nge wou l d b e u n u s abl e ; ho w e ve r , fou r ot he r re g i s t e r s a s s o c i a t e d w i t h f a n sp e e d c o n t rol he l p t h e us er t o a v o i d this p r ob l e m. f a n s t a r t-u p v o l t a g e r e g i st ers (0x30 a n d 0x31) det e r m in e t h e v o l t a g e i n i t ia l l y a p plie d t o t h e fan s a t st a r t u p . t h is sh o u ld b e hig h en oug h t o en s u r e tha t t h e f a n s s t a r t. mini m u m sp e e d r e g i sters (0x 3 2 a nd 0x 33) deter m i n e t h e mini m u m v o l t age t h a t is a p plie d t o t h e fan s . t h is sh o u ld b e hig h e n oug h t o k e ep t h e fa n s t u r n in g an d le s s t h a n t h e v o l t a g e r e q u i r ed t o s t a r t th em . the s p e e d r e g i st ers as s o c i a t e d wi t h a u t o ma t i c fa n s p e e d con t rol (afc) a r e th e maxim u m sp ee d r e g i s t ers (0x3 4 a nd 0x35). they a l l o w t h e m a x i m u m out p ut f r om t h e d a c s to b e l i mite d to l e s s th a n t h e full-scale o u t p u t . s o m e sui t a b le f a n dr i v e cir c ui ts a r e sho w n i n f i gur e 33 a n d f i gur e 34. b a si c a l l y , v o l t a g e am plif ica t ion is r e quir e d t o b o ost t h e f u l l - s c a l e output of t h e d a c to 5 v or 1 2 v , an d t h e a m plif ier n e e d s s u f f i cien t dr i v e c u r r en t t o m e et t h e dr i v e r e q u i r e m e n ts o f th e fa n . n o t e t h a t as t h e ext e r n al tra n sist o r in cr e a s e s t h e o p en-lo o p ga in of t h e op a m p , it m a y b e ne c e ss ar y to a d d a c a p a c i tor arou n d th e f e e d ba ck lo o p t o m a i n t a in s t a b ili t y . 04711-032 q1 2n2219 a 12v r3 1k ? 1/4 lm324 a ou t r1 10k ? r2 12k ? (5v) 43k ? (12v) f i gure 3 3 . f a n d r i v e cir c ui t wi th o p a m p a n d emi t t e r - f o ll o w er 04711-033 q1 irf9620 5v or 12v 1/4 lm324 dac r3 100k ? r1 10k ? r2 12k ? (5v) 43k ? (12v) f i gure 34. f a n d r ive cir c u i t w i th p - channe l mosfet pwm or switch m o de fan drive l i n e a r dc sp e e d co n t r o l l ers, s u ch as t h e on es de s c r i b e d p r e v io usly , waste p o w e r , w h ich is dissi p a t e d a s h e a t i n t h e p o wer t r a n sisto r . t o s a ve p o w e r an d r e d u ce h e a t di ssi p a t io n, i t m a y b e desir a b l e to con t r o l t h e fan sp e e d w i t h a m o r e e f f i cien t dc- d c co n v er t e r o r a pu ls e wi d t h m o d u la t e d (pwm) sp e e d con t r o l l er . i n this cas e , t h e d r ive o u t p u t s o f th e adt746 6 p r o v ide t h e r e fer e n c e v o l t a g e fo r t h is cir c ui t . t o maximi ze e f f i cien c y , t h e co n t r o l l er ca n b e swi t ch e d o f f co m p lete l y w h enev er t h e f a n 1 dr i v e va l u e fal l s b e lo w t h e val u e in t h e v_f a n_ min r e g i s t er . w h en t h is ha p p en s, t h e f a n1 _ o n o u t p u t g o es lo w . 04711-034 ADT7466 v+ drive1 fan1 on drive voltage shutdown dc-dc or pwm fan speed controller f i gur e 3 5 . dc-dc or pw m f a n spe e d co ntr o l fan speed measurement tach inputs pin 2 an d pi n 4 a r e t a ch i n p u ts i n te n d e d fo r fa n sp e e d m e as ur em en t. the ADT7466 c a n m e as ur e t h e s p eed o f 3-wir e fa n s . e a c h 3 - wir e fa n has tw o s u p p l y wir e s an d a tac h o u t p u t wir e . s i g n al con d i t ionin g in t h e ADT7466 acco mmo d a t es t h e s l o w r i s e a nd fa l l t i mes ty p i c a l o f fa n t a ch ometer o u tp u t s. t h e maxim u m in p u t sig n al ra n g e is 0 v t o 6.5 v , ev en w h en v cc is le s s th a n 5 v . i f th e s e in p u ts a r e s u p p li e d f r o m fa n o u t p u t s t h a t exce e d 0 v t o 6. 5 v , ei t h er r e sis t i v e a t t e n u a t ion o f t h e fan sig n al o r dio d e clam p i n g m u s t b e i n cl ude d t o k e ep in p u ts wi t h i n a n accep t ab le ra n g e . monitoring 3-wire f a ns f i gur e 36 t o f i g u r e 39 s h o w circ ui ts f o r m o s t c o mm on 3-wir e fa n tach o u t p u t s. i f the fa n tac h ou t p u t has a r e sisti v e p u l l -u p t o v cc , i t can be co nn e c te d dir e c t ly to t h e fan i n p u t, as sho w n i n f i gur e 36. 04711-035 fan drive v cc ADT7466 tach tach output fan speed counter pullup 4.7k ? typ. f i gure 36. f a n w i th t a ch p u ll-up t o +v cc
ADT7466 rev. 0 | page 27 of 48 i f t h e fa n ou t p ut has a r e sis t i v e p u l l -u p t o 12 v (o r o t h e r v o l t a g e g r ea t e r tha n 6.5 v), t h e fan o u t p u t can b e c l am p e d wi t h a z e n e r dio d e , as sho w n in f i gur e 37. th e z e n e r dio d e v o l t a g e sh o u l d be gr ea t e r th a n v ih o f t h e tach in p u t b u t less tha n 6.5 v , al lo w i n g fo r t h e v o l t a g e t o lerance o f t h e z e n e r . a val u e o f betw een 3 v and 5 v is s u i t a b l e . 04711-036 fan drive v cc ADT7466 tach zd1* zener *choose zd1 voltage approx. 0.8 v cc tach output fan speed counter pull-up 4.7k ? typ. f i g u re 37. f a n w i t h t a ch. p u ll-up to v o ltag e >6. 5 v , fo r e x amp l e , 1 2 v cl a m ped wit h zener d i od e . i f the fa n has a str o n g p u l l -u p (les s tha n 1 k?) to 12 v , o r a tote m p o l e output , a s e r i e s re s i stor c a n b e a dde d to l i m i t t h e z e n e r c u r r en t, as s h o w n in f i gu r e 38. al t e r n a t i v e l y , a r e sis t i v e a t t e n u a t o r ca n b e us ed , as sho w n in f i gur e 39. r1 a nd r2 s h o u ld b e c h os en s u c h tha t 2 v < v pull up r2 /( r pull up + r1 + r2 ) < 5 v the fan in p u ts ha v e an in p u t r e sis t a n c e o f n o minal l y 160 k? t o g r ou nd, w h i c h s h ou l d b e t a ke n i n to a c c o u n t w h e n c a l c u l a t i n g re s i stor v a lu e s . w i t h a pu l l - u p volt age of 1 2 v an d pu l l - u p re s i stor l e ss t h an 1 k?, s u i t a b le val u es f o r r1 a n d r2 a r e 100 k? a nd 47 k?. this gi v e s a h i gh in p u t v o l t a g e o f 3 . 83 v . 04711-037 fan drive v cc ADT7466 tach zd1* zener *choose zd1 voltage approx. 0.8 v cc tach output r1 10k ? fan speed counter pull-up typ. < 1k ? or totem pole f i gure 38. f a n w i th str o ng t a c h . p u ll-u p t o >v cc o r t o t e m p o le o u tput, cl am p e d wi th z e ner a n d resi stor . 04711-038 fan drive v cc ADT7466 tach r1* r2* *see text tach output fan speed counter <1k ? f i gure 39. f a n w i th str o ng t a c h . p u l l - up to >vc c o r t o tem p o l e o u tput, a t t e nu at ed wi th r 1 / r 2. fan sp ee d r e gisters the fan co un ter do es n o t co u n t t h e fa n t a ch o u tp u t p u ls es dir e c t l y bec a us e th e f a n sp ee d c a n b e les s than 1000 r p m; i t w o u l d t a k e s e ve r a l s e co nds to a c c u m u l a te a r e a s o n a b ly la rge a nd acc u r a te coun t. i n ste a d , t h e p e r i o d o f t h e fan r e vol u t i on is m e a s ur e d b y ga t i n g an o n -chi p 82 khz os ci l l a t o r in t o t h e in pu t of a 1 6 - bit c o u n te r f o r n p e r i o d s of t h e f a n t a c h output , a s sh ow n i n fi g u re 4 0 . t h e a c c u m u l a te d c o u n t i s a c tu a l ly prop or t i on a l to t h e f a n t a c h om e t e r p e r i o d a n d i n ve r s ely prop or t i on a l to t h e f a n s p e e d. 04711-039 c loc k tach 1 2 f i gure 40. f a n spee d measu r e m ent n, t h e n u m b er o f p u ls es co un t e d , is de t e r m i n e d b y t h e s e t t i n g s o f reg i s t er 0x39 (fa n p u ls es p e r r e v o l u tio n r e g i st er). this r e g i s t er co n t ains 2 b i ts f o r eac h fa n, al lo win g 1, 2 (defa u l t ), 3 o r 4 t a ch pu l s e s to b e c o u n te d. the fan t a ch omet er r e adin gs a r e 16-b i t va l u es c o n s is t i n g o f a 2-b y te r e ad f r o m t h e ad t746 6. table 24. fan s p ee d measurement registers r e g i s t e r d e s c r i p t i o n d e f a u l t 0x48 tach1 low byte 0xff 0x49 tach1 high byte 0xff 0x4a tach2 low byte 0xff 0x4b tach2 high byte 0xff r e adin g f a n sp e e d fr o m the ad t7466 m e a s uri n g fa n s p eed s in v o l v e s a 2- r e gi s t e r r e a d f o r ea c h m e as ur e m en t. the lo w b y t e sho u ld b e r e ad f i rs t, w h ich ca us es th e hig h b y t e t o be f r ozen u n til bo t h hig h and lo w b y t e r e g i s t ers a r e r e ad . this pr e v en ts er r o n e ous t a ch r e adin gs . the fan t a ch omet er r e adin g r e g i s t ers r e p o r t t h e n u m b er o f 12.2 s p e r i o d clo c ks (82 kh z o s cil l a t o r ) ga t e d to th e fan sp eed co un t e r f r o m t h e r i sin g edg e o f th e f i rst fa n tach p u ls e t o t h e r i sin g edg e o f t h e thir d fa n t a c h p u ls e , as s u min g tw o p u ls es p e r r e v o l u t i o n is b e i n g co un t e d . si nce t h e de v i ce is es s e n t i a l l y m e as ur in g t h e f a n t a ch p e r i o d , t h e hig h er t h e c o un t v a l u e , t h e slo w er t h e fan is ac t u a l ly r u nning. a 16- b i t fa n t a ch om e t er r e ad in g o f 0xff ff in dica t e s ei t h er tha t t h e fan has s t alled o r t h a t i t is r u nni ng ver y slo w ly (<75 r p m). a gr e a t e r t h a n c o m p a r is o n is p e r f o r m e d w h e n c o m p a r in g wi t h th e h i g h lim i t . the ac t u a l fa n t a ch p e r i o d is b e in g m e asur e d i n t h is cas e . t h e r e f o r e , wh en t h e fa n ta ch l i m i t i s e x ceeded , a 1 i s se t f o r th e a p p r o p r i a t e st a t us b i t and can b e us e d to ge n e r a te a n aler t .
ADT7466 rev. 0 | page 28 of 48 the fan tach limit registers are 16-bit values consisting of 2 bytes. table 25. fan tach limit registers register description default 0x4c tach1 minimum low byte 0xff 0x4d tach1 minimum high byte 0xff 0x4e tach2 minimum low byte 0xff 0x4f tach2 minimum high byte 0xff fan speed measurement rate the fan tach readings are normally updated once every second. the fast bit (bit 3) of configuration register 3 (0x02) updates the fan tach readings every 250 ms, when set to 1. if any of the fans are not being driven by a fan drive output, but are powered directly from 5 v or 12 v, its associated dc bit in configuration register 3 should be set. this allows tach readings to be taken on a continuous basis for fans connected directly to a dc source. calculating fan speed assuming a fan with two pulses/revolution (and two pulses/revolution being measured) fan speed is calculated by fan speed (rpm) = (82000 60)/ fan tach reading where fan tach reading is the 16-bit fan tachometer reading. for example, if tach1 high byte (reg. 0x49) = 0x17 tach1 low byte (reg. 0x48) = 0xff then fan speed in rpm is fan 1 tach reading = 0x17ff = 6143 decimal rpm = (82000 60)/fan 1 tach reading rpm = (82000 60)/6143 = 800 = fan speed fan pulses per revolution different fan models can output either 1, 2, 3, or 4 tach pulses per revolution. once the number of fan tach pulses is determined, it can be programmed into the fan pulses per revolution register (0x39) for each fan. alternatively, this register can be used to determine the number of pulses/revolution output by a given fan. by plotting fan speed measurements at 100% speed with different pulses/revolution settings, the smoothest graph with the lowest ripple determines the correct pulses/revolution value. table 26. fan pulses per revolution register fan default 1:0 fan1 2 pulses per revolution 3:2 fan2 2 pulses per revolution table 27. fan pulses per revolution values code pulses per revolution 00 1 01 2 10 3 11 4 the ADT7466 has a unique fan spin-up function. it spins the fan with the fan start-up voltage until two tach pulses are detected on the tach input. once two pulses are detected, the fan drive goes to the expected running value. the advantage of this is that fans have different spin-up characteristics and take different times to overcome inertia. the ADT7466 runs the fans just fast enough to overcome inertia and is quieter on spin-up than fans programmed to spin-up for a given spin-up time. fan start-up timeout to prevent false interrupts being generated as a fan spins up (since it is below running speed), the ADT7466 includes a fan start-up timeout function. this is the time limit allowed for two tach pulses to be detected on spin-up. for example, if a 2-second fan start-up timeout is chosen, and no tach pulses occur within two seconds of the start of spin-up, a fan fault is detected and flagged in interrupt status register 1. start-up timeout configuration (reg. 0x38) bits 2:0 control the start-up timeout for drive1. bits 5:3 control the start-up timeout for drive2. table 28. start-up timeout configuration code timeout 000 no start-up timeout 001 100 ms 010 250 ms 011 400 ms 100 667 ms 101 1 second 110 2 seconds 111 4 seconds
ADT7466 rev. 0 | page 29 of 48 automatic fan speed control the ADT7466 has a local temperature sensor and a remote temperature channel, which can be connected to an on-chip diode-connected transistor on a cpu. in addition, the two analog input channels can be reconfigured for temperature measurement. any or all of these temperature channels can be used as the basis for automatic fan speed control to drive fans according to system temperature. by running the fans at only the speed needed to maintain a desired temperature, acoustic noise is reduced. reducing fan speed can also decrease system current consumption. to use automatic fan control (afc), a number of parameters must be set up. which temperature channel controls which fan? this is determined by the afc configuration registers (0x05 and 0x06). afc1 configuration register controls fan 1, and afc2 configuration register controls fan 2. setting bits in these registers decides which temperature channels controls the fan. table 29. afc configuration registers bit description bit 0 fan controlled by th1 or rem2 bit 1 fan controlled by th2 bit 2 fan controlled by remote temperature 1 bit 3 fan controlled by local temperature bit 4 fan under manual control bit 5 fan at minimum speed bit 6 fan at start-up speed bit 7 fan at maximum speed if more than one of the temperature channel bits 0:3 are set, the channel that demands the highest fan speed takes control. when th1 and th2 are set up as ain1 and ain2, these pins still control the afc loop if bits 0:1 in the afc configuration register are set. bits 0:1 should not be set in analog input mode. if the manual control bit is set, afc is switched off and the drive registers can be programmed manually. this overrides any setting of the temperature channel bits. the maximum rpm registers, 0x34 and 0x35, should be set to 0x00 when the fans are under manual control. if the minimum speed bit is set, afc is switched off and the fan runs at minimum speed. this overrides any setting of bits 4:0. if the start-up speed bit is set, afc is switched off and the fan runs at start-up speed. this overrides any setting of bits 5:0. if the maximum speed bit is set, afc is switched off and the fan runs at maximum speed. this overrides any setting of bits 6:0. fan start voltage (v_fan_on) this is the minimum drive voltage from the dac at which a fan starts running. this depends on the parameters of the fan and the characteristics of the fan drive circuit. minimum fan speed (v_fan_min) this is the minimum drive voltage from the dac at which a fan keeps running, which is lower than the voltage required to start it. this depends on the parameters of the fan and the characteristics of the fan drive circuit. maximum fan speed for acoustic reasons it may be desirable to limit the maximum rpm of the fans. these values are programmed into the maximum fan speed registers (0x34 and 0x35). during afc, the fan speed is monitored and is never allowed to exceed the programmed limit, even if the afc loop demands it. however, the maximum fan speed limit can be overridden by a therm event, which sets the fan drive to full scale (full speed) for emergency cooling. operating temperature range the temperature range over which afc operates can be programmed by using the tmin and trange registers. tmin is the temperature at which a fan starts and runs at minimum speed when in afc mode. trange is the temperature range over which afc operates. thus, if tmin is set to 40c and trange is set to 20c, the fan starts when the temperature exceeds 40c and the fan reaches maximum speed at a temperature of 60c. enhanced acoustics when fan speed is controlled automatically, a temperature event can cause the fan drive output to change instantaneously to a new value. the sudden subsequent change in fan speed can cause an audible noise pulse. to avoid this problem, the ADT7466 can be programmed so that the drive value changes in a series of small steps, using the enhanced acoustics register (0x36). bits 2:0 of this register allow eight step sizes from 1 to 48 bits to be selected for fan 1. bits 5:3 do the same for fan 2. when automatic fan control requires a change in drive value, the value changes by the step size once every 250 ms until the final value is reached. for example, if the step size is 3 and the drive value changes from 137 to 224, the drive value takes 29 ms 250 ms to reach its final value. enhanced acoustics for the fan 1 output (drive1) can be enabled by setting bit 6 of the enhanced acoustics register, and by setting bit 7 for fan 2 (drive2).
ADT7466 rev. 0 | page 30 of 48 afc loop operation starti ng t h e fa n the a u t o ma t i c f a n s p e e d con t r o l lo o p o p era t es as fol l o w s. u n der n o r m al c o n d i t io ns, t h e v _ f a n_o n r e g i s t er s e ts d r ive a t a v o l t a g e s u f f i cien t t o s t a r t t h e fa n r o t a t i ng. f a n s t a r t u p is co nf ir m e d a f ter tw o t a ch p u ls es a r e gen e r a te d . on ce t h e t e m p era t ur e exceeds t_mi n, t h e ADT7466 o u t p u t s th e v o l t a g e v_f a n_on o n i t s d r ive p i n. f o r f a n 1, f a n1 o n is als o as s e r t e d . w h en t h e fan s t a r ts r o t a t i n g r e l i a b l y , t h e dr i v e vol t a g e is r e d u c e d to v_f a n_ min. rel i ab le st a r t u p is det e r m i n e d w h en t w o t a ch om e t er p u ls es a r e s e n s e d on t h e t a ch in p u t. a s t h e me as ur e d t e m p era t ur e i n cr e a s e s, t h e v o l t a g e o u t p u t b y t h e ad t7466 als o incr eas e s lin e a r l y . the ra te wi t h wh i c h t h e v o l t a g e o u t p u t (fa n s p eed ) in cr ease s i s co n t r o ll ed b y th e t _ r a n g e pa ra m e t e r . 1. s e t t h e ini t ial v _ f a n_o n b y bi os. 2. w a i t f o r tw o tach p u ls es (u p t o 2 s e co n d s maxim u m). 3. i f s u cces sf u l , s e t t h e dr i v e t o v_ f a n_min and fol l o w t h e au t o m a t i c s l o p e . i f not su c c e ss f u l , inc r e a s e t h e v _ f a n_ on vol t age on d r ive b y a p r o g ra mm e d val u e (s et in s t ep si ze r e g i s t er) a nd r e t u r n t o s t ep 1. this s e q u en ce ca n b e r e p e a t e d f i v e tim e s o r un til drive is s e t a t f u l l s c ale . i f t h e fan s t il l fa ils to st ar t , t h e fa n l o c k pi n i s a s s e r t e d . on ce t h e m e asu r e d fa n sp e e d r e ach e s a p r og ra mma b l e max i m u m li m i t, th e fa n s p eed d o e s n o t i n c r ea se fu rth e r . t h i s i s t o m a in t a in l o w a c ou st i c s . i f , howe ve r , t h e therm fa il s a f e l i m i t i s b r ea ch e d , t h e fa n s i mmedi a t e l y r u n t o full s p eed (0xff). they co n t in ue to r u n a t f u l l s p e e d un t i l t h e t e m p era t ur e fal l s b y a p r og ra mma b l e h y s t er esis va l u e b e lo w t h e therm limi t. then th e fa n sp e e d r e d u ces t o i t s val u e befo r e t h e therm limi t is e x ceed ed . 4. s e t t h e dr i v e a t 0 v (to a v o i d hi g h p o wer dissi p a t io n). 5. w a it 1 m i n u te a n d re p e a t t h e e n t i re s e qu e n c e . ( t h i s s e q u en ce r e co v e rs th e s i t u a t io n if th e fan is t e m p o r a r il y st a l le d d u e a m e cha n ica l r e as o n such as ja m m e d wi t h a st ick. ) a s t h e t e m p era t ur e de cr e a s e s, t h e fan sp e e d de cr e a s e s alo n g t h e s a m e c u r v e . once t h e t e m p er a t ur e fal l s b e l o w t_mi n, t h e fan r u n s a t v_f a n_min. i f t h e t e m p era t ur e con t i n ues t o de cr e a s e , t h e f a n can con t i n u e to r u n a t v _ f a n_ mi n , o r if t h e t e m p e r a t u r e dr o p s b e lo w a h y ste r esis va l u e, t h e f a n can b e swi t ch ed o f f co m p lete l y . this is co n t r o l l ed b y bi ts 4:5 o f c o nf igura t ion reg i st er 4. s e t t i n g t h es e b i t s ens u r e s t h a t t h e fan s ne ver go b e lo w mini m u m sp e e d . f a n 1 on is a l s o de ass e r t e d w h en t h e fa n dr i v e is s e t t o 0 v . 04711-041 full speed 2.25v ( 0 xff) fan drive v tmin tacho v_fan_on v_fan_min fan off 0v ( 0 x00) the fan s p ee d is u p da t e d ev er y 250 m s t o 500 m s in t h e a u t o ma tic fan sp eed con t r o l lo o p . 04711-040 full speed 2.25v (0xff) fan drive v max fan speed fan spin up for 2 tach pulses temperature t_therm tmin tmin_hys trange tmax v_fan_on v_fan_min fan off 0v (0x00) t_therm_hys f i gur e 4 2 . norm al f a n star ti ng t i mi ng di a g r a m 04711- 042 full speed 2.25v ( 0 xff) fan drive v fan1_on fan_lock v_fan_on v_fan_on_step v_fan_min fan off 0v (0x00) 2sec 1min f i g u re 41. o p er at i o n of a f c l oop f i gure 43. abnor m al f a n star t i ng (f an stalled)
ADT7466 rev. 0 | page 31 of 48 xor test mode the ADT7466 in c l udes a n x o r tr ee t e s t m o de . this m o de is us ef u l fo r in-cir c u i t t e st e q u i pmen t a t b o a r d-le ve l t e st ing. by a p p l ying s t im u l us t o th e p i n s inc l uded in t h e x o r tr ee , i t is p o s s ib l e t o dete c t op e n s o r sho r t s on t h e sy s t e m bo a r d. f i gure 4 4 s h o w s t h e s i g n a l s t h a t a r e exer cis e d i n t h e x o r t r e e t e s t m o de . the x o r tr e e tes t is in v o k e d b y s e t t in g b i t 0 (xen) o f t h e x o r t r e e t e st enab le r e g i st er (0x42). pin 7 sh o u ld b e co nf igur e d as a pro c h o t in p u t b y s e t t in g bi t 1 (p7c1) o f c o nf igura t ion reg i st er 3 (0x02). the pro c h o t mask b i t (reg. 0x13, b i t 1) s h o u l d als o b e s e t. scl tach1 sda prochot alert 04711-043 tach2 drive1 f i gur e 4 4 . ad t7 46 6 x o r t r ee
ADT7466 rev. 0 | page 32 of 48 appli c ation circuit f i gur e 45 sh o w s a typ i cal a p p l ic a t io n c i r c ui t diag ra m f o r th e ADT7466. th e a n alog in p u ts a r e co nf igur ed f o r th er mis t o r tem p er a t ur e m o ni to r i ng. i n p u ts d+ a nd d? a r e us e d to m e as ur e t h e t e m p era t ur e o f a dis c r e t e t r a n sis t o r . i n a n ac t u al a p plic a t ion, e v e r y in p u t an d o u t p u t ma y n o t b e us e d . i n t h is c a s e , u n u s e d an a l o g and d i g i t a l i n put s s h ou l d b e t i e d to g r ou nd . pu l l -u p r e sis t o r s a r e r e q u ir e d on scl, s d a, f a n1_o n, pro c h o t / therm , a nd fa n l o c k . ther e a r e tw o dr iv e o u t p uts w h ich c o n t r o l t h e s p e e d o f tw o fa n s . ther e a r e als o tw o tac h in p u ts f r o m t h e fan s f o r m o ni t o r i n g t h e fa n s p eed . 04711-045 ADT7466 drive1 1 scl 16 tach1 2 sda 15 drive2 3 alert 14 tach2 4 refout 13 gnd 5 ain2/th2/d2+ 12 v cc 6 ain1/th1/d2? 11 7 d1+ 10 8 d1 ? 9 fanlock fan1_on/prochot/therm v cc v cc 10k ? 10k ? v cc 2k ? 2k ? v cc 10k ? sclock sdata smb_alert r ext 1 th1 r ext 2 th2 2n3904 npn fan drive circuitry fan drive circuitry v cc 10k ? v cc 10k ? fan1_on/prochot/therm fanlock signals fan failure f i gure 45. t y pic a l a p plic at ion cir c u i t
ADT7466 rev. 0 | page 33 of 48 ADT7466 register map table 30. ADT7466 registers addr. r/w name description bit 7 bit 6 bi t 5 bit 4 bit 3 bit 2 bit 1 bit 0 default lock- able 0x00 r/w conf1 configuration 1 obin vcc todis fspdis fspd rdy lock strt 0x01 yes 0x01 r/w conf2 configuration 2 rem2 shdn rate avg refz curr rtype 0x00 yes 0x02 r/w conf3 configuration 3 ther 2 ther1 dc2 dc1 fast boost p7c1 p7c0 0xc0 yes 0x03 r/w conf4 configuration 4 min2 min1 sngl ch2 ch1 ch0 0x00 yes 0x04 r/w conf5 reserved 0x00 yes 0x05 r/w afc1 afc1 configuration max strt min man loc rem th2 th1 0x0c yes 0x06 r/w afc2 afc2 configuration max strt min man loc rem th2 th1 0x0c yes 0x07 reserved 7 6 5 4 3 2 1 0 0x00 yes 0x08 r ext1 extended resolution 1 ain1-1 ain1-0 ain2-1 ain2-0 vcc1 vcc0 rem1 rem0 0x00 0x09 r ext2 extended resolution 2 loc1 loc0 0x00 0x0a r ain1 ain1(th1)/rem2 reading 9 8 7 6 5 4 3 2 0x00 0x0b r ain2 ain2(th2) reading 9 8 7 6 5 4 3 2 0x00 0x0c r v cc v cc reading 9 8 7 6 5 4 3 2 0x00 0x0d r rem1 remote1 temp reading 9 8 7 6 5 4 3 2 0x00 0x0e r loc local temp reading 9 8 7 6 5 4 3 2 0x00 0x0f r pcht prochot reading tmr tmr tmr tmr tmr tmr tmr asrt/ tmr0 0x00 0x10 r int1 interrupt status 1 ool ain1(th1)/ rem2 ain2(th2) v cc rem1 loc fan1 fan2 0x00 0x11 r int2 interrupt status 2 th2 th1 d2 d1 phot ovt 0x00 0x12 r/w mask1 interrupt mask 1 ool ain1(th1)/ rem2 ain2(th2) v cc rem loc fan1 fan2 0x00 0x13 r/w mask2 interrupt mask 2 th2 th1 d2 d1 phot ovt 0x00 0x14 r/w ain1low ain1(th1)/rem2 low limit 7 6 5 4 3 2 1 0 0x00 0x15 r/w ain1high ain1(th1)/rem2 high limit 7 6 5 4 3 2 1 0 0xff 0x16 r/w ain2low ain2(th2) low limit 7 6 5 4 3 2 1 0 0x00 0x17 r/w ain2high ain2(th2) high limit 7 6 5 4 3 2 1 0 0xff 0x18 r/w vcclow v cc low limit 7 6 5 4 3 2 1 0 0x00 0x19 r/w vcchigh v cc high limit 7 6 5 4 3 2 1 0 0xff 0x1a r/w rem1low remote1 temp low limit 7 6 5 4 3 2 1 0 0x00 0x1b r/w rem1high remote1 temp high limit 7 6 5 4 3 2 1 0 0x7f 0x1c r/w loclow local temp low limit 7 6 5 4 3 2 1 0 0x00 0x1d r/w lochigh local temp high limit 7 6 5 4 3 2 1 0 0x7f 0x1e r/w pchtlim prochot limit limt limt limt limt limt limt limt limt 0x00 yes 0x1f r/w ain1therm ain1(th1)/rem2 therm limit 7 6 5 4 3 2 1 0 0x64 yes 0x20 r/w ain2therm ain2(th2) therm limit 7 6 5 4 3 2 1 0 0x64 yes 0x21 r/w rem1therm remote 1 therm limit 7 6 5 4 3 2 1 0 0x64 yes 0x22 r/w loctherm local therm limit 7 6 5 4 3 2 1 0 0x64 yes 0x23 r/w reserved 7 6 5 4 3 2 1 0 0x00 yes 0x24 r/w ain1ofs ain1(th1)/rem2 offset 7 6 5 4 3 2 1 0 0x00 yes 0x25 r/w ain2ofs ain2(th2) offset 7 6 5 4 3 2 1 0 0x00 yes 0x26 r/w rem1ofs remote1 temp offset 7 6 5 4 3 2 1 0 0x00 yes 0x27 r/w locofs local temp offset 7 6 5 4 3 2 1 0 0x00 yes 0x28 r/w ain1tmin ain1(th1)/rem2 tmin 7 6 5 4 3 2 1 0 0x5a yes 0x29 r/w ain2tmin ain2(th2) tmin 7 6 5 4 3 2 1 0 0x5a yes
ADT7466 rev. 0 | page 34 of 48 addr. r/w name description bit 7 bit 6 bi t 5 bit 4 bit 3 bit 2 bit 1 bit 0 default lock- able 0x2a r/w rem1tmin remote1 tmin 7 6 5 4 3 2 1 0 0x5a yes 0x2b r/w loctmin local tmin 7 6 5 4 3 2 1 0 0x5a yes 0x2c r/w thtrange th1(rem2)/th2 trange th1r3 th1r2 th1r1 th1r0 th 2r3 th2r2 th2r1 th2r0 0xcc yes 0x2d r/w r1ltrange rem1,loc trange rm1r3 rm1r2 rm1r 1 rm1r0 lor3 lor2 lor1 lor0 0xcc yes 0x2e r/w ththys th1,th2 thyst th1th3 th1th2 th1th1 th1th0 th2th3 th2th2 th2th1 th2th0 0x44 yes 0x2f r/w r1lthys rem1/ local thyst rm1h3 rm1h2 rm1h1 rm1h0 loh3 loh2 loh1 loh0 0x44 yes 0x30 r/w fan1start fan1 start-up voltage 7 6 5 4 3 2 1 0 0x80 yes 0x31 r/w fan2start fan2 start-up voltage 7 6 5 4 3 2 1 0 0x80 yes 0x32 r/w fan1min fan1 min voltage 7 6 5 4 3 2 1 0 0x60 yes 0x33 r/w fan2min fan2 min voltage 7 6 5 4 3 2 1 0 0x60 yes 0x34 r/w fan1max fan1 max rpm (high byte) 7 6 5 4 3 2 1 0 0x20 yes 0x35 r/w fan2max fan2 max rpm (high byte) 7 6 5 4 3 2 1 0 0x20 yes 0x36 r/w enhanced enhanced acoustics fan2en fan1en fan2-2 fan2-1 fan2-0 fan1-2 fan1-1 fan1-0 0x3f yes 0x37 r/w faultinc fault increment 7 6 fan2-2 fan2-1 fan2-0 fan1-2 fan1-1 fan1-0 0x3f yes 0x38 r/w timeout startup timeout configuration st2-2 st2-1 st2-0 st1-2 st1-1 st1-0 0x00 yes 0x39 r/w pulses fan pulses per revolution fan2 fan2 fan1 fan1 0x05 0x3a r/w reserved 7 6 5 4 3 2 1 0 0x00 yes 0x3b r/w not used 0x3c r/w not used 0x3d r/w id device id register 7 6 5 4 3 2 1 0 0x66 0x3e r company company id number 7 6 5 4 3 2 1 0 0x41 0x3f r rev revision number ver ver ver ver ver ver ver ver 0x02 0x40 r/w drive 1 drive 1 7 6 5 4 3 2 1 0 0x00 0x41 r/w drive 2 drive 2 7 6 5 4 3 2 1 0 0x00 0x42 r/w xor xor tree test enable xen 0x00 yes 0x43 r/w reserved 7 6 5 4 3 2 1 0 0x00 yes 0x44 r/w reserved (target monitor1) 7 6 5 4 3 2 1 0 0x00 0x45 r/w reserved (target monitor2) 7 6 5 4 3 2 1 0 0x00 0x46 r/w not used 0x47 r/w not used 0x48 r tach1l tach1 low byte 7 6 5 4 3 2 1 0 0xff 0x49 r tach1h tach1 high byte 15 14 13 12 11 10 9 8 0xff 0x4a r tach2l tach2 low byte 7 6 5 4 3 2 1 0 0xff 0x4b r tach2h tach2 high byte 15 14 13 12 11 10 9 8 0xff 0x4c r/w tach1low tach1 minimum low byte 7 6 5 4 3 2 1 0 0xff 0x4d r/w tach1high tach1 minimum high byte 7 6 5 4 3 2 1 0 0xff 0x4e r/w tach2low tach2 minimum low byte 7 6 5 4 3 2 1 0 0xff 0x4f r/w tach2high tach2 minimum high byte 7 6 5 4 3 2 1 0 0xff 0x50 r/w test1 test register1 7 6 5 4 3 2 1 0 0x00 yes 0x51 r/w test2 test register2 7 6 5 4 3 2 1 0 0x00 yes 0x52 r/w test3 test register3 7 6 5 4 3 2 1 0 0x00 yes 0x53 r/w test4 test register4 7 6 5 4 3 2 1 0 0x00 yes
ADT7466 rev. 0 | page 35 of 48 register details configuration 1 table 31. register 0x00configuration register 1 (power-on default = 0x01) bit no. name read/write description 0 strt read/write logic 1 enables monitoring, and pw m control outputs based on th e limit settings programmed. logic 0 disables monitoring and pwm control based on the default power-up limit settings. the limit values programmed are preserved even if a logic 0 is written to this bit and the default settings are enabled. this bit becomes read only and cannot be changed once bit 1 (lock bit) is written. all limit registers should be programmed by bios before setting this bit to 1. lockable. 1 lock write once logic 1 locks all limit values to their current settings. once this bit is set, all lockable registers become read only and cannot be modified until the adt 7466 is powered down and powered up again. this prevents rogue programs such as viruses from modi fying critical system limit settings. lockable. 2 rdy read only this bit is set to 1 by the adt74 66 to indicate that the device is fully powered up and ready to begin systems monitoring. 3 fspd read/write when this bit is 1, it runs all fans at full speed. power-on default is 0. this bit is not locked at any t ime. 4 fspdis read/write logic 1 disables fan spin-up for two tach pulses. in stead, the dac outputs go high for the entire fan spin-up timeout selected. 5 todis read/write when this bit is 1, the smbus time out feature is disabled. this allo ws the ADT7466 to be used with smbus controllers that cannot handle smbus timeouts. lockable. 6 v cc read/write when this bit is 1, the ADT7466 rescales its v cc pin to measure a 5 v supply. when this bit is 0, the ADT7466 measures v cc as a 3.3 v supply. lockable. 7 obin read/write when this bit is 0 (de fault) temperature data format is binary. when this bit is 1, format is offset binary. configuration 2 this register becomes read only when the configuration register 1 lock bit is set to 1. additional attempts to write to this re gister have no effect. table 32. register 0x01configuration register 2 (power-on default = 0x00) bit no. name read/write description 0 rtype read/write when this bit is cleare d (default), thermistor norm alization is optimized for 100 k? thermistors. when this bit is set, it is optimized for 10 k? thermistors. 1 curr read/write this bit sets the ther mal diode current. it should be left at 0. 2 refz read/write setting this bi t makes the refout pin high impedance. 3 unused C unused. write ignored. reads back 0. 4 avg read/write when avg is 1, averaging on the temperature and voltage measurements is turned off. this allows measurements on each channel to be made much faster. 5 rate read/write if averaging is turned off and me asurement set to single channe l mode, the rate bit sets the conversion rate. 0 = 32 conversions/second; 1 = 4 conversions/second. 6 shdn read/write when shdn is 1, the ADT7466 goes into shutdown mode. both dac outp uts are set to 0 v to switch off both fans. the dac registers read back 0x00 to in dicate that the fans are not being driven. 7 rem2 read/write setting this bit configures ain1 and ain2 for conne ction of a second thermal diode. setting this bit overrides ther1 and ther2 in configuration register 3.
ADT7466 rev. 0 | page 36 of 48 configuration 3 this register becomes read only when the configuration register 1 lock bit is set to 1. additional attempts to write to this re gister have no effect. bits 4:5 are not locked. table 33. register 0x02configuration register 3 (power-on default = 0xc0) bit no. name read/write description 1:0 p7config read/write these bits configure pin 7 as either fan1_on output, therm output or prochot input. 00 = fan1_on output 01 = therm output 1x = prochot input 2 boost read/write when boost is set to 1, assertion of prochot causes all fans to run at 100% duty cycle for fail safe cooling. 3 fast read/write setting this bit to 1 enables fast tach measurem ents on all channels. this increases the tach measurement rate from once a second, to one every 250 ms (4). 4 dc1 read/write setting this bit to 1 enables tach measuremen ts to be continuously made on tach1. not lockable. 5 dc2 read/write setting this bit to 2 enables tach measuremen ts to be continuously made on tach2. not lockable. 6 ther2 read/write setting this bit to 1 configures ain1 as a thermistor input. setting this bit to 0 config ures for analog input. 7 ther1 read/write setting this bit to 1 configures ain2 as a thermistor input. setting this bit to 0 config ures for analog input. configuration register 4 table 34. register 0x03configuration register 4 (power-on default = 0x00) bit no. name r/w description 2:0 ch2:0 read/write these bits select the input channel when sngl bit is set. 011 = remote 1 temperature 100 = local temperature 101 = remote 2 temperature 3 sngl read/write setting this bi t selects single channel measurement. 4 min1 read/write when this bit is set, fan 1 never goes below minimum speed setting. 5 min2 read/write when this bit is set, fan 2 never goes below minimum speed setting. 6 unused read only unused. write ignored. reads back 0. 7 unused read only unused. write ignored. reads back 0. afc1 configuration if more than one of bits 0:3 are set, the fan speed is controlled by whichever temperature channel demands the highest fan spee d. table 35. register 0x05afc configuratio n register 1 (power-on default = 0x0c) bit no. name read/write description 0 th1/rem2 read/write when this bit is set, fan 1 speed is controlled by th1 if pin 11 is configured for thermistor, or by thermal diode 2 if pin 11 is configured for thermal diode. 1 th2 read/write when this bit is set, fan 1 speed is controlled by th2 if pin 12 is configured for thermistor. 2 rem1 read/write when this bit is set, fan 1 sp eed is controlled by remo te temperature input 1. 3 loc read/write when this bit is set, fan 1 speed is controlled by local temperature input. 4 man read/write when this bit is set, fan 1 speed is under user cont rol by writing directly to the drive1 register. this overrides all lower bit settings 5 min read/write when this bit is set, fan 1 runs at minimum speed. this overrides all lower bit settings. 6 strt read/write when this bit is set, fan 1 runs at start-up speed. this overrides all lower bit settings. 7 max read/write when this bit is set, fan 1 runs at maximum speed. this overrides all lower bit settings.
ADT7466 rev. 0 | page 37 of 48 afc2 configuration if more than one of bits 0:3 are set, the fan speed is controlled by whichever temperature channel demands the highest fan spee d. table 36. register 0x06afc configuratio n register 2 (power-on default = 0x0c) bit no. name read/write description 0 th1/rem2 read/write when this bit is set, fan 2 speed is controlled by th1 if pin 11 is configured for thermistor, or by thermal diode 2 if pin 11 is configured for thermal diode. 1 t h2 read/write when this bit is set, fan 2 speed is controlled by th2 if pin 12 is configured for thermistor. 2 rem1 read/write when this bit is set, fan 2 sp eed is controlled by remo te temperature input 1. 3 loc read/write when this bit is set, fan 2 sp eed is controlled by the local temperature input. 4 man read/write when this bit is set, fan 2 speed is under user cont rol by writing directly to the drive2 register. this overrides all lower bit settings. 5 min read/write when this bit is set, fan 2 runs at minimum speed. this overrides all lower bit settings. 6 strt read/write when this bit is set, fan 2 runs at startup speed. this overrides all lower bit settings. 6 max read/write when this bit is set, fan 2 runs at maximum speed. this overrides all lower bit settings. extended resolution 1 table 37. register 0x08extended resolution register 1 (power-on default = 0x00) bit no. name read/write description 0 rem0 read only lsb of remote temperature reading. 1 rem1 read only bit 1 of remote temperature reading. 2 vcc0 read only lsb of v cc reading. 3 vcc1 read only bit 1 of v cc reading. 4 ain2-0 read only lsb of ain2 reading. 5 ain2-1 read only bit 1 of ain2 reading 6 ain1-0 read only lsb of ain1 reading. 7 ain1-1 read only bit 1 of ain1 reading. extended resolution 2 table 38. register 0x09extended resolution register 2 (power-on default = 0x00) bit no. name read/write description 0 loc0 read only lsb of local temperature reading. 1 loc1 read only bit 1 of local temperature reading. 2 unused read only not used. reads back 0. 3 unused read only not used. reads back 0. 4 unused read only not used. reads back 0. 5 unused read only not used. reads back 0. 6 unused read only not used. reads back 0. 7 unused read only not used. reads back 0. voltage reading if the extended resolution bits of these readings are also being read, extended resolution register 1 (0x08) should be read fir st. once the extended resolution register is read, it and the associated msb reading registers are frozen until read. table 39. voltage reading registers (power-on default = 0x00) register address read/write description 0x0a read only ain1(th1)/rem2 reading (8 msbs of reading). 0x0b read only ain2(th2) reading (8 msbs of reading). 0x0c read only v cc reading. measures v cc through the v cc pin (8 msbs of reading).
ADT7466 rev. 0 | page 38 of 48 temp er atu re r e a d i ng if the extended resolution bits of these readings are also being read, the extended resolution registers (0x08, 0x09) should be read first. once the extended resolution register gets read, all associated msb reading registers get frozen until read. both the extended resolution register and the msb registers are frozen. table 40. temperature reading registers (power-on default = 0x00) register address read/write description 0x0d read only remote temperatur e 1 reading (8 msbs of reading). 0x0e read only local temperature reading (8 msbs of reading). prochot table 41. register 0x0f prochot register (power-on default = 0x00) bit no. name read/write description 7:1 tmr read only times for how long therm input is asserted. these 7 bits read 0 until the prochot assertion time exceeds 45.52 ms. 0 asrt/tmr0 read only set high on the assertion of the therm input. cleared on read. if the prochot assertion time exceeds 45.52 ms, this bit is set and becomes the lsb of the 8-bit tmr reading. this allows prochot assertion times from 45.52 ms to 5.82 seconds to be reported back with a resolution of 22.76 ms. interrupt status 1 table 42. register 0x10interrupt status register 1 (power-on default = 0x00) bit no. name read/write description 0 fan2 read only setting this bit to 1 indicates that fan 2 has dropped below minimum speed or has stalled. this bit is not set when the drive2 output is off. 1 fan1 read only setting this bit to 1 indicates that fan 1 has dropped below minimum speed or has stalled. this bit is not set when the drive1 output is off. 2 loc read only setting this bit to 1 indicates that the local te mperature reading is out of limit. this bit is cleared on a read of the status register only if the error condition clears. 3 rem1 read only setting this bit to 1 indicates that remote temperature 1 reading is out of limit. this bit is cleared on a read of the status register only if the error condition clears. 4 v cc read only setting this bit to 1 indicates that the v cc reading is out of limit. this bit is cleared on a read of the status register only if the error condition clears. 5 ain2(th2) read only setting this bit to 1 indicates th at the ain2(th2) reading is out of limit. this bit is cleared on a read of the status register only if the error condition clears. 6 ain1(th1)/rem2 read only setting this bit to 1 indicates th at the ain1(th1)/rem2 reading is out of limit. this bit is cleared on a read of the status register on ly if the error condition clears. 7 ool read only setting this bit to 1 indicates that an out-limit event is latched in st atus register 2. this bit is a logical or of all status bits in status register 2. software can test this bit in isolation to determine whether any of the voltage, tempera ture, or fan speed readings represented by status register 2 are out of limit. this saves th e need to read status register 2 during every interrupt or polling cycle.
ADT7466 rev. 0 | page 39 of 48 interrupt status 2 table 43. register 0x11interrupt status register 2 (power-on default = 0x00) bit no. name read/write description 0 ovt read only setting this bit to 1 indicates that one of the therm overtemperature limits has been exceeded. this bit is cleared a utomatically when the temperature drops below therm ? t hyst . 1 phot read only if pin 7 is configured as the input for prochot monitoring, this bit is set when the prochot assertion time exceeds the limit programmed in the prochot limit register (0x1e). 2 d1 read only setting this bit to 1 indicates either an open or a short circuit on the thermal diode 1 inputs. 3 d2 read only setting this bit to 1 indicates either an open or a short circuit on the thermal diode 2 inputs. 4 th1 read only setting this bit to 1 indicates either an open or a short circuit on the th1 input. 5 th2 read only setting this bit to 1 indicates either an open or a short circuit on the th2 input. 6 unused read only not used. reads back 0. 7 unused read only not used. reads back 0. interrupt mask 1 table 44. register 0x12interrupt mask register 1 (power-on default = 0x00) bit no. name read/write description 0 fan2 read only setting this bit masks the fan 2 interrupt from the alert output. 1 fan1 read only setting this bit masks the fan 1 interrupt from the alert output. 2 loc read only setting this bit masks the local temperature. interrupt from the alert output. 3 rem read only setting this bit masks the remote temperature interrupt from the alert output. 4 v cc read only setting this bit masks the v cc interrupt from the alert output. 5 ain2(th2) read only setting this bit masks the ain2(th2) interrupt from the alert output. 6 ain1 /th1/rem2 read only setting this bit masks the ain1 (th1)/rem2 interrupt from the alert output. 7 ool read only setting this bit masks the ool interrupt from the alert output. interrupt mask 2 table 45. register 0x13interrupt mask register 2 (power-on default = 0x00) bit no. name read/write description 0 ovt read only setting this bit masks the ovt interrupt from alert output. 1 phot read only setting this bit masks the therm interrupt from alert output. 2 d1 read only setting this bit masks the therma l diode 1 fault interrupt from alert output. 3 d2 read only setting this bit masks thermal diode 2 fault interrupt from alert output. 4 th1 read only setting this bit masks the th1 fault interrupt from alert output. 5 th2 read only setting this bit masks the th2 fault interrupt from alert output. 6 unused read only not used. reads back 0. 7 unused read only not used. reads back 0.
ADT7466 rev. 0 | page 40 of 48 volt age l i mit setting the configuration register 1 lock bit has no effect on these registers. high limits: an interrupt is generated when a value exceeds its high limit (> comparison). low limits: an interrupt is generated when a value is equal to or below its low limit ( comparison). table 46. voltage limit registers register address read/write description power-on default 0x14 read/write ain1(th1)/rem2 low limit. 0x00 0x15 read/write ain1(th1 )/rem2 high limit. 0xff 0x16 read/write ain2(th2) low limit. 0x00 0x17 read/write ain2(th2) high limit. 0xff 0x18 read/write v cc low limit. 0x00 0x19 read/write v cc high limit. 0xff temp er atu re l i m it setting the configuration register 1 lock bit has no effect on these registers. when the temperature readings are in offset bin ary format, an offset of 64 degrees (0x40 or 0100000) must be added to all temperature and therm limits. for example, if the limit is 50c the actual programmed limit is 114. high limits: an interrupt is generated when a value exceeds its high limit (> comparison). low limits: an interrupt is generated when a value is equal to or below its low limit ( comparison). table 47. temperature limit registers register address read/write description power-on default 0x1a read/write remote 1 temperature low limit. 0x00 0x1b read/write remote 1 te mperature high limit. 0x7f 0x1c read/write local temperature low limit. 0x00 0x1d read/write local temperature high limit. 0x7f prochot limit this is an 8-bit limit with a resolution of 22.76 ms allowing prochot assertion limits of 45.52 ms to 5.82 seconds to be programmed. if the prochot assertion time exceeds this limit, bit 1 of interrupt status register 2 (0x11) is set. if the limit value is 0x00, an interrup t is generated immediately upon assertion of the therm input. table 48. register 0x1e prochot limit register (power-on default = 0x00) bit no. name read/write description 7:0 limt read/write sets maximum prochot assertion length allowed before an interrupt is generated.
ADT7466 rev. 0 | page 41 of 48 therm limit if any temperature measured exceeds its therm limit, both drive outputs drive their fans at maximum output. this is a failsafe mechanism incorporated to cool the system in the event of a critical overtemperature. it also ensures some level of cooling in the event that software or hardware locks up. if set to 0x00, this feature is disabled. the drive output remains at 0xff until the temper ature drops below therm limit ? hysteresis. if the therm pin is programmed as an output, exceeding these limits by 0.25c can cause the therm pin to assert low as an output. these registers become read only when the configuration register 1 lock bit is set to 1. additional attempts to write to these registers have no effect. table 49. therm limit registers register address read/write description power-on default 0x1f read/write ain1/th1rem2 therm limit. 0x64 (100c) 0x20 read/write ain2(th2) therm limit. 0x64 (100c) 0x21 read/write remote 1 therm limit. 0x64 (100c) 0x22 read/write local therm limit. 0x64 (100c) temperature offset these registers contain an 8-bit, twos complement offset value that is automatically added to or subtracted from the temperatur e reading to compensate for any systematic errors such as those caused by noise pickup. lsb value = 1c. this register becomes read only when the configuration register 1 lock bit is set to 1. additional attempts to write to this re gister have no effect. table 50. temperature offset registers register address read/write description power-on default 0x24 read/write ain1(th1)/rem2 offset. 0x00 0x25 read/write ain2(th2) offset. 0x00 0x26 read/write remote 1 offset. 0x00 0x27 read/write local offset. 0x00 tmin these registers contain the tmin temperatures for automatic fan control (afc). these are the temperatures above which the fan s tarts to operate. the data format is either binary or offset binary, the same as the temperature reading, depending on which option is c hosen by setting or clearing bit 7 of configuration register 1. these registers become read only when the configuration register 1 lock bit is set to 1. additional attempts to write to these registers have no effect. table 51. tmin registers register address read/write description power-on default 0x28 read/write ain1(th1)/rem2 t min . 0x5a (90c) 0x29 read/write ain2(th2) t min . 0x5a (90c) 0x2a read/write remote 1 t min . 0x5a (90c) 0x2b read/write local t min . 0x5a (90c)
ADT7466 rev. 0 | page 42 of 48 table 52. tmin codes temperature binary offset binary -64c 0 000 0000 0 000 0000 0c 0 000 0000 0 100 0000 1c 0 000 0001 0 100 0001 10c 0 000 1010 0 100 1010 25c 0 001 1001 0 101 1001 50c 0 011 0010 0 111 0010 75c 0 100 1011 1 000 1011 100c 0 110 0100 1 010 0100 125c 0 111 1101 1 011 1101 127c 0 111 1111 1 011 1111 191c 0 111 1111 1 111 1111 tht range table 53. register 0x2cthtrange register (power-on default = 0xcc) bit no. name read/write description 3:0 th2r read/write these bits set the temperature range over which afc operates for the th2 input. the fan starts operating at t m and reaches full speed at t m + t r (where t m is the temperature set by the tmin code, and t r is the temperature range set by the trange code). 7:4 th1r read/write these bits set the temperature range over which afc operates for the th1 or rem2 input. the fan starts operating at t m and reaches full speed at t m + t r (where t m is the temperature set by the tmin code, and t r is the temperature range set by the trange code). remote and local trange table 54. register 0x2dremote and local tr ange register (power-on default = 0xcc) bit no. name read/write description 3:0 lor read/write these bits set the temperature range over whic h afc operates for the local temperature input. the fan starts operating at t m and reaches full speed at t m + t r (where t m is the temperature set by the tmin code, and t r is the temperature ranges set by the trange code). 7:4 rmr read/write these bits set the temperature range over which afc operates for the remote 1 (d1) temperature input. the fan starts operating at t m and reaches full speed at t m + t r (where t m is the temperature set by the tmin code, and t r is the temperature range set by the trange code). table 55. trange codes bits 7:4 or 3:0 trange 0000 2c 0001 2.5c 0010 3.33c 0011 4c 0100 5c 0101 6.67c 0110 8c 0111 10c 1000 13.33c 1001 16c 1010 20c 1011 26.67c 1100 32c (default) 1101 40c 1110 53.33c 1111 80c
ADT7466 rev. 0 | page 43 of 48 th1/th2 hysteresis table 56. register 0x2eth1/th2 hysteres is register (power-on default = 0x44) bit no. name read/write description 7:4 th1th read/write this nibble contains the temperature hysteresis value for th1/rem2. 0x0 = 0c to 0xf = 15c. 3:0 th2th read/write this nibble contains the temperature hy steresis value for th2. 0x0 = 0c to 0xf = 15c. rem/loc hysteresis table 57. register 0x2frem/loc hysteres is register (power-on default = 0x44) bit no. name read/write description 7:4 rm1h read/write this nibble contains the temperature hy steresis value for remote temperature input. 0x0 = 0c to 0xf = 15c. 3:0 loh read/write this nibble contains the temperature hysteresis value for local temperature input. 0x0 = 0c to 0xf = 15c. fan start-up voltage this is the voltage output from the fan drive output for two tach periods after it first starts up. taking gain into account, t he fan drive amplifier should be chosen so the voltage applied to the fan is sufficiently high to ensure that the fan starts. table 58. fan start-up voltage registers (power-on default = 0x80) register address read/write description 0x30 read/write fan 1 start-up voltage. 0x31 read/write fan 2 start-up voltage. fan maximum voltage this is the minimum voltage output from the fan drive output after the fan spins up, in the absence of any other speed control input. table 59. fan minimum voltage regi sters (power-on default = 0x60) register address read/write description 0x32 read/write fan 1 minimum voltage. 0x33 read/write fan 2 minimum voltage. fan maximum rpm this is the maximum rpm that the fan can run at in afc mode. table 60. fan maximum rpm regist ers (power-on default = 0x20) register address read/write description 0x34 read/write fan 1 maximum rpm. 0x35 read/write fan 2 maximum rpm.
ADT7466 rev. 0 | page 44 of 48 enhanced acoustics table 61. register 0x36enhanced acoust ics register (power-on default = 0x3f) bit no. name read/write description 2:0 5:3 fan1 step fan2 step read/write read/write these bits set the step size by whic h the drive1 and drive2 pwm output duty-cycle can change when enhanc e acoustics mode is selected. 000 = 1 bit 001 = 2 bits 010 = 3 bits 011 = 5 bits 100 = 8 bits 101 = 12 bits 110 = 24 bits 111 = 48 bits 6 enable fan1 enhanced acoustics read/write when this bit is set to 1, e nhanced acoustics are enabled for fan 1. 7 enable fan2 enhanced acoustics read/write when this bit is set to 1, e nhanced acoustics are enabled for fan 2. fault increment table 62. register 0x37fault increment register (power-on default = 0x3f) bit no. name read/write description 2:0 5:3 fan1fault fan2 fault read/write read/write these bits set the step size by whic h the drive1 and drive2 pwm output duty-cycle can change in fan fault mode. 000 = 1 bit 001 = 2 bits 010 = 3 bits 011 = 5 bits 100 = 8 bits 101 = 12 bits 110 = 24 bits 111 = 48 bits 7:6 unused C unused. write ignored. reads back 0. start-up timeout configuration table 63. register 0x38start-up timeout conf iguration register (power-on default = 0x00) bit no. name read/write description 2:0 st1 read/write these bits se t the start-up timeout for fan 1. 5:3 st2 read/write these bits set the start-up timeout for fan 2. 000 = no start-up timeout 001 = 100 ms 010 = 250 ms 011 = 400 ms 100 = 667 ms 101 = 1second 110 = 2 seconds 111 = 4 seconds 7:6 unused C unused. write ignored. reads back 0.
ADT7466 rev. 0 | page 45 of 48 fan pulses per revolution table 64. register 0x39fan pulses per revo lution register (power-on default = 0x05) bit no. name read/write description 1:0 fan1 read/write sets number of pulses to be counte d when measuring fan1 speed. can be used to determine fans pulses per revo lution number for unknown fan type. pulses counted 00 = 1 01 = 2 (default) 10 = 3 11 = 4 3:2 fan2 read/write sets number of pulses to be counte d when measuring fan2 speed. can be used to determine fans pulses per revo lution number for unknown fan type. pulses counted 00 = 1 01 = 2 (default) 10 = 3 11 = 4 7:4 unused C unused. write ignored. reads back 0. information registers table 65. register 0x3ddevice id register (power-on default = 0x66) bit no. name read/write description 7:0 reserved read only contains device id number. table 66. register 0x3ecompany id register (power-on default = 0x41) bit no. name read/write description 7:0 reserved read only contains company id number. table 67. register 0x3frevision number register (power-on default = 0x02) bit no. name read/write description 7:0 reserved read only contains device revision level. fan drive (dac) these registers reflect the drive value of each fan at any given time. when in automatic fan speed control mode, the ADT7466 re ports the drive values back through these registers. the fan drive values vary according to temperature in automatic fan speed control mo de. during fan startup, these registers report 0x00. in software mode, the fan drive outputs can be set to any value by writing to these registers. table 68. fan drive (dac) registers (power-on default = 0x00) register address read/write description 0x40 read/write drive1, current fan 1 drive value. 0x41 read/write drive2, current fan 2 drive value. xor tree test enable this register becomes read only when the configuration register 1 lock bit is set to 1. additional attempts to write to this re gister have no effect. table 69. register 0x42xor tree test enable (power-on default = 0x00) bit no. name read/write description 7:1 reserved C unused. do not write to these bits. 0 xen read/write if the xen bit is set to 1, the device ente rs the xor tree test mode. clearing the bit removes the device from the xor test mode.
ADT7466 rev. 0 | page 46 of 48 fan tachometer reading these registers count the number of 12.43 s periods (based on a local 82 khz clock) that occur between a number of consecutive fan tach pulses (default = 2). the number of tach pulses used to count can be changed by using the fan pulses per revolution regist er (0x39). this allows the fan speed to be accurately measured. since a valid fan tachometer reading requires two bytes to be read, the lo w byte must be read first. both the low and high bytes are then frozen un til read. at power-on, these registers contain 0x0000 until such t ime as the first valid fan tach measurement is read into these registers. this prevents false interrupts from occurring while the fans are spinning up. a count of 0xffff indicates that a fan is ? stalled or blocked (object jamming the fan). ? failed (internal circuitry destroyed). ? not populated (the ADT7466 expects to see a fan connected to each tach. if a fan is not connected to that tach, its tach minimu m high and low byte should be set to 0xffff). ? 2-wire instead of 3-wire. table 70. fan tachometer reading re gisters (power-on default = 0xff) register address read/write description 0x48 read only tach1 low byte 0x49 read only tach1 high byte 0x4a read only tach2 low byte 0x4b read only tach2 high byte fan tachometer limit exceeding any of the tach limit registers by 1 indicates that the fan is running too slowly or has stalled. the appropriate sta tus bit is set in interrupt status register 1 to indicate the fan failure. setting the configuration register 1 lock bit has no effect on these r egisters. table 71. fan tachometer limit registers (power-on default = 0xff) register address read/write description 0x4c read/write tach 1 minimum low byte 0x4d read/write tach 1 minimum high byte 0x4e read/write tach 2 minimum low byte 0x4f read/write tach 2 minimum high byte manufacturers test these registers are for manufacturers use only and should not be read or written to in normal use. these registers become read only when the configuration register 1 lock bit is set to 1. additional attempts to write to these register have no effect. table 72. register 0x3fmanufacturers te st registers (power-on default = 0x00) register address read/write description 0x50 read/write manufacturers test register 1 0x51 read/write manufacturers test register 2 0x52 read/write manufacturers test register 3 0x53 read/write manufacturers test register 4
ADT7466 rev. 0 | page 47 of 48 outline dimensions 16 9 8 1 pin 1 sea t i n g pl a n e 0. 01 0 0. 00 4 0. 01 2 0. 00 8 0. 025 bs c 0. 010 0. 006 0. 05 0 0. 01 6 8 0 coplanarity 0.004 0. 065 0. 049 0. 069 0. 053 0. 154 bs c 0. 2 3 6 bs c compliant to jedec standards mo-137ab 0. 1 9 3 bs c f i gure 46. 1 6 -l ead shrink sm al l o u t lin e p a ckage [qs o p ] (r q - 16) d i mensions sh o w n in inc h es ordering guide model temperature r a nge package descri ption package option ADT7466arq z 1 ?40c to +125c 16-lead qsop rq-16 ADT7466arq z- reel 1 ?40c to +125c 16-lead qsop rq-16 ADT7466arq z- reel7 1 ?40c to +125c 16-lead qsop rq-16 eval-ad t7466e b e v a l u a t i o n boar d 1 z = pb-free part.
ADT7466 rev. 0 | page 48 of 48 notes ? 2005 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . d04711C0C 6/05(0)

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